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== 32 bit Windows specific ==

If the Microsoft Windows discussed is specific to 32 bit, then it would be more clearer to put them in the header.
As many people who reads the page for quick reference may miss this detail.

] (]) 17:40, 29 November 2018 (UTC)

: PAE is a processor feature. Information about support in specific OSs (Windows or otherwise) therefore does not belong in the article header. The processor feature would exist even if no OSs supported it. ] (]) 17:59, 29 November 2018 (UTC)


== PAE Xeon only == == PAE Xeon only ==
Line 32: Line 23:
All IA-32 processors had at most a 32bit data bus. 36 address registers only allows paging - it is not PAE support. All IA-32 processors had at most a 32bit data bus. 36 address registers only allows paging - it is not PAE support.


Only Xeon had 36bits for RAM. (2x 16bit banks + 4bit segment selector). (Xeon was technically a 36bit CPU). Only Xeon had 36bits for RAM. Xeon supported 8GB RAM total. The 8GB was split into 2x 4GB memory banks accessed one bank at a time. The 32bit + 4bit bus allowed a segment selector.
(Xeon was technically a 36bit CPU).


] (]) 23:25, 10 May 2020 (UTC) ] (]) 23:25, 10 May 2020 (UTC)

:No, as that's rubbish. Where's the definition of that per Intel? The article currently has it right ] - the chipset and motherboard etc have to also support 36 bit, which I know myself certainly some non-Xeons did. <span class="vcard"><span class="fn">]</span>; ]</span> 22:09, 1 September 2020 (UTC)

== First Linux kernel to support PAE ==

The section says 2.3.23 but under the old scheme odd numbers were development kernels (2.2 series was the release, 2.3 was concurrent and the development space for what would ship as 2.4). Would probably make sense to also mention which kernel was the first to ship with PAE, since no released distro would use a development kernel. --] (]) 03:44, 1 May 2022 (UTC)

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PAE Xeon only

It should be made clear the only IA-32 processor which supported Physical Address Extension as defined by Intel was Xeon. PAE requires BOTH 36 address registers AND 36bit data bus for RAM.

All IA-32 processors had at most a 32bit data bus. 36 address registers only allows paging - it is not PAE support.

Only Xeon had 36bits for RAM. Xeon supported 8GB RAM total. The 8GB was split into 2x 4GB memory banks accessed one bank at a time. The 32bit + 4bit bus allowed a segment selector. (Xeon was technically a 36bit CPU).

Onzite. (talk) 23:25, 10 May 2020 (UTC)

No, as that's rubbish. Where's the definition of that per Intel? The article currently has it right Physical Address Extension#Hardware support - the chipset and motherboard etc have to also support 36 bit, which I know myself certainly some non-Xeons did. Widefox; talk 22:09, 1 September 2020 (UTC)

First Linux kernel to support PAE

The section says 2.3.23 but under the old scheme odd numbers were development kernels (2.2 series was the release, 2.3 was concurrent and the development space for what would ship as 2.4). Would probably make sense to also mention which kernel was the first to ship with PAE, since no released distro would use a development kernel. --97.115.191.42 (talk) 03:44, 1 May 2022 (UTC)

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