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{{Short description|A technique to increase the amount of usable memory}}
{{refimprove|date=January 2015}}
{{Confuse|Paging}}
] of bank-switched memory for a processor that can only address 64 kB. This scheme shows 200 kB of memory, of which only 64 kb can be accessed at any time by the processor. The operating system must manage the bank-switching operation to ensure that program execution can continue when part of memory is not accessible to the processor.]]
{{Use dmy dates|date=February 2020|cs1-dates=y}}
] of bank-switched memory for a processor that can only address 64 KB. This scheme shows 200 KB of memory, of which only 64 KB can be accessed at any time by the processor. The operating system must manage the bank-switching operation to ensure that program execution can continue when part of memory is not accessible to the processor.]]


'''Bank switching''' is a technique used in computer design to increase the amount of usable memory beyond the amount directly addressable by the ].<ref name="Aspinall" /> It can be used to configure a system differently at different times; for example, a ] required to ] from diskette could be switched out when no longer needed. In video game systems, bank switching allowed larger games to be developed for play on existing consoles. '''Bank switching''' is a technique used in computer design to increase the amount of usable memory beyond the amount directly addressable by the ]<ref name="Aspinall_1978"/> instructions. It can be used to configure a system differently at different times; for example, a ] required to ] from diskette could be switched out when no longer needed. In video game systems, bank switching allowed larger games to be developed for play on existing consoles.


Bank switching originated in ] systems.<ref name="Bell" /> Many modern ]s and ]s use bank switching to manage ], non-volatile memory, input-output devices and system management registers in small ]s. The technique was common in ] ] systems. Bank-switching may also be used to work around limitations in address bus width, where some hardware constraint prevents straightforward addition of more address lines. Some control-oriented microprocessors use a bank-switching technique to access internal I/O and control registers, which limits the number of register address bits that must be used in every instruction. Bank switching originated in ] systems.<ref name="Bell_1971"/> Many modern ]s and ]s use bank switching to manage ], non-volatile memory, input-output devices and system management registers in small ]s. The technique was common in ] ] systems. Bank-switching may also be used to work around limitations in address bus width, where some hardware constraint prevents straightforward addition of more address lines, and to work around limitations in the ], where the addresses generated are narrower than the address bus width. Some control-oriented microprocessors use a bank-switching technique to access internal I/O and control registers, which limits the number of register address bits that must be used in every instruction.


Unlike memory management by ], data is not exchanged with a mass storage device like ]. Data remains in quiescent storage in a memory area that is not currently accessible to the processor, (although it may be accessible to the video display, ], or other subsystems of the computer). Unlike memory management by ], data is not exchanged with a mass storage device like ]. Data remains in quiescent storage in a memory area that is not currently accessible to the processor (although it may be accessible to the video display, ], or other subsystems of the computer) without the use of special prefix instructions.


== Technique == == Technique ==
Bank switching can be considered as a way of extending the ] of processor instructions with some register. Examples:
*The follow-on system<ref>{{cite book
| title = Control Data 160-A Computer Programming Manual
| id = 145e
| section = Storage Control
| page = 2-09
| date = March 1963
| url = http://bitsavers.org/pdf/cdc/160/145e_CDC160A_ProgMan_Mar63.pdf
| publisher = CDC
}}
</ref> to a processor with a 12 bit address has a 15 bit address bus, but there is no way to directly specify the high three bits on the address bus. Internal bank registers can be used to provide those bits.
*The follow-on system<ref>{{cite book
| title = Control Data 3600 Computer System Reference Manual
| id = 60021300E
| url = http://bitsavers.org/pdf/cdc/3x00/48bit/3600/60021300E_3600_SysRef_Sep64.pdf
| publisher = CDC
}}
</ref> to a processor with a 15 bit address has an 18 bit address bus, but legacy instructions only have 15 address bits; internal bank registers can be used to provide those bits. Some new instructions can explicitly specify the bank.


<!-- Much of this text should be split off into a section on microprocessors. -->
Bank switching can be considered as a way of extending the ] of a processor with some external register. For example, a processor with a 16-bit external address bus can only address 2<sup>16</sup> = 65536 memory locations. If an external ] was added to the system, it could be used to control which of two sets of memory devices, each with ] addresses, could be accessed. The processor could change which set is in current use by setting or clearing the latch bit.
*A processor with a 16-bit external address bus can only address 2<sup>16</sup>&nbsp;= 65536 memory locations. If an external ] was added to the system, it could be used to control which of two sets of memory devices, each with ] addresses, could be accessed. The processor could change which set is in current use by setting or clearing the latch bit. <br>The latch can be set or cleared by the processor in several ways; a particular memory address may be decoded and used to control the latch, or, in processors with separately-decoded ], an output address may be decoded. Several bank-switching control bits could be gathered into a register, approximately doubling the available memory spaces with each additional bit in the register. <br>Because the external bank-selecting latch (or register) is not directly connected with the ] of the processor, it does not automatically change state when the program counter overflows; this cannot be detected by the external latch since the program counter is an internal register of the processor. The extra memory is not seamlessly available to programs. Internal registers of the processor remain at their original length, so the processor cannot directly span all of bank-switched memory by, for example, incrementing an internal register.<ref name="Heath_2003"/> Instead the processor must explicitly do a bank-switching operation to access large memory objects. There are other limitations. Generally{{cn|date=June 2020}} a bank-switching system will have one block of program memory that is common to all banks; no matter which bank is currently active, for part of the address space only one set of ]s will be used. This area would be used to hold code that manages the transitions between banks, and also to process ]s.


Often a single database spans several banks, and the need arises to move records between banks (as for sorting). If only one bank is accessible at a time, it would be necessary to move each byte twice: first into the common memory area, perform a bank switch to the destination bank, and then actually to move the byte into the destination bank. If the computer architecture has a ] engine or a second CPU, and its bank access restrictions differ, whichever subsystem can transfer data directly between banks should be used.
The latch can be set or cleared by the processor in several ways; a particular memory address may be decoded and used to control the latch, or, in processors with separately-decoded ], an output address may be decoded. Several bank-switching control bits could be gathered into a register, approximately doubling the available memory spaces with each additional bit in the register.


Unlike a ] scheme, bank-switching must be explicitly managed by the running program or operating system; the processor hardware cannot automatically detect that data not currently mapped into the active bank is required. The application program must keep track of which ] holds a required piece of data, and then call the bank-switching routine to make that bank active.<ref name="Mueller_1992"/> However, bank-switching can access data much faster than, for example, retrieving the data from disk storage.
Because the external bank-selecting latch (or register) is not directly connected with the ] of the processor, it does not automatically change state when the program counter overflows; this cannot be detected by the external latch since the program counter is an internal register of the processor. The extra memory is not seamlessly available to programs. Internal registers of the processor remain at their original length, so the processor cannot directly span all of bank-switched memory by, for example, incrementing an internal register.<ref name="Heath03" /> Instead the processor must explicitly do a bank-switching operation to access large memory objects. There are other limitations. Generally a bank-switching system will have one block of program memory that is common to all banks; no matter which bank is currently active, for part of the address space only one set of ]s will be used. This area would be used to hold code that manages the transitions between banks, and also to process ]s.

The transfer of data between banks can be problematic if the computer architecture permits only one bank to be resident at a time. This often can be the situation when a single database is contained in banked memory and it spans several banks, and the need arises to move records between banks (as for sorting). In this instance, it would be necessary to move each byte twice: first into the common memory area, perform a bank switch to the destination bank, and then actually to move the byte into the destination bank. This procedure is called double-buffering. It can be avoided if the hardware design uses ] which can transfer data directly between banks.

Unlike a ] scheme, bank-switching must be explicitly managed by the running program or operating system; the processor hardware cannot automatically detect that data not currently mapped into the active bank is required. The application program must keep track of which ] holds a required piece of data, and then call the bank-switching routine to make that bank active.<ref name="Mueller92" /> However, bank-switching can access data much faster than, for example, retrieving the data from disk storage.


== Microcomputer use == == Microcomputer use ==
] memory board was used to map the memory into one or more of 8 distinct 64KB banks.<ref>{{cite journal|last=Garland|first=Harry|title=Design Innovations in Personal Computers|journal=Computer|publisher=IEEE Computer Society|quote=An eight-position DIP switch on such cards is used to select one (or more) of eight banks of memory | date=March 1977|volume=10|issue=3|page=25 |url=http://www.computer.org/csdl/mags/co/1977/03/01646402-abs.html|doi=10.1109/c-m.1977.217669}}</ref>]] ] memory board was used to map the memory into one or more of eight distinct 64&nbsp;KB banks.<ref name="Garland_1977"/>]]


Processors with ] addressing (], ], ], ], etc.) commonly used in early ]s and ]s can directly address only 64 ]. Systems with more memory had to divide the address space into a number of blocks that could be dynamically mapped into parts of a larger address space. Bank switching was used to achieve this larger address space by organizing memory into separate banks of up to 64KB each.<ref>{{cite book|last1=Garland|first1=Harry|title=Introduction to Microprocessor System Design|date=1979|publisher=McGraw-Hill Book Company|isbn=0-07-022871-X|page=93|quote=With memory bank select, memory space is arranged in a number of separate banks of up to 64K each.}}</ref> Blocks of various sizes were switched in and out via bank select registers or similar mechanisms. ] was the first microcomputer manufacturer to use bank switching, supporting 8 banks of 64KB in its systems.<ref>{{cite journal|last1=Hogan|first1=Thom|title=Share and Share Alike: Multiuser Hardware Explained|journal=Infoworld|date=June 8, 1981|volume=3|issue=11|page=18|url=https://books.google.com/books?id=zD0EAAAAMBAJ&pg=PA18&lpg=PA18&dq=Cromemco+bank+switching&source=bl&ots=96gDqoIAfK&sig=1NyHu_mgyDJnuw6tmLCO9xhWfwU&hl=en&sa=X&ved=0ahUKEwiI8MujyYHKAhVXzmMKHdprCcAQ6AEIODAG#v=onepage&q=Cromemco%20bank%20switching&f=false|quote=Cromemco was the first microcomputer manufacturer to refine and exploit bank switching.}}</ref> Processors with ] addressing (], ], ], ], etc.) commonly used in early ]s and ]s can directly address only 64&nbsp;]. Systems with more memory had to divide the address space into a number of blocks that could be dynamically mapped into parts of a larger address space. Bank switching was used to achieve this larger address space by organizing memory into separate banks of up to 64&nbsp;KB each.<ref name="Garland_1979"/> Blocks of various sizes were switched in and out via bank select registers or similar mechanisms. ] was the first microcomputer manufacturer to use bank switching, supporting 8 banks of 64&nbsp;KB in its systems.<ref name="Hogan_1981"/>


When using bank switching some caution was required in order not to corrupt the handling of ] calls, ]s, the ], and so on. While the contents of memory temporarily switched out from the CPU was inaccessible to the processor, it could be used by other hardware, such as video display, ], ], etc. The last version of ] released in 1982 supported bank switching to allow use of more than the 64K of memory that the 8080 or Z80 processor could address.<ref name="Freiberger" /> When using bank switching some caution was required in order not to corrupt the handling of ] calls, ]s, the ], and so on. While the contents of memory temporarily switched out from the CPU was inaccessible to the processor, it could be used by other hardware, such as video display, ], ], etc. ] 3.0 released in 1983 and the Z80-based ]s the ] and ] supported bank switching to allow use of more than the 64&nbsp;KB of memory that the 8080 or Z80 processor could address.<ref name="Freiberger_1982"/>


Bank switching allowed extra memory and functions to be added to a computer design without the expense and incompatibility of switching to a processor with a wider ]. For example, the ] used bank switching to allow for a full 64KB of RAM and still provide for ROM and ] as well. The ] could allow its two processors (the 6502 and the ]) to access separate RAM banks, allowing programmers on both machines to make large playfields and other graphic objects without using up the memory visible to the CPU. Bank switching allowed extra memory and functions to be added to a computer design without the expense and incompatibility of switching to a processor with a wider ]. For example, the ] used bank switching to allow for a full 64&nbsp;KB of RAM and still provide for ROM and ] as well. The ] could allow its two processors (the 6502 and the ]) to access separate RAM banks, allowing programmers to make large playfields and other graphic objects without using up the memory visible to the CPU.

Microcomputers using bank switching include:

* ]
* ]
* ]
* ]
* ]
* ]
* ]
* ]
* ]
* ]
* ] - 256 pages * 16k = 4 MB
* ]
* ]
* ] - 256 pages * 16k = 4 MB
* ]
* ]
* ]


==Microcontrollers== ==Microcontrollers==
]s (microprocessors with significant input/output hardware integrated on-chip) may use bank switching, for example, to access multiple configuration registers or on-chip read/write memory. An example is the ]. This allows short instruction words to save space during routine program execution, at the cost of extra instructions required to access relatively infrequently used registers, such as those used for system configuration at start-up. ]s (microprocessors with significant input/output hardware integrated on-chip) may use bank switching, for example, to access multiple configuration registers or on-chip read/write memory. An example is the ]. This allows short instruction words to save space during routine program execution, at the cost of extra instructions required to access relatively infrequently used registers, such as those used for system configuration at start-up.


== The IBM PC == == The IBM PC ==
] ]
In 1985, the companies ] and ] introduced ] Specification (EMS) 3.0 for use in ] computers running ]. ] joined for versions 3.2 in 1986 and 4.0 in 1987 and the specification became known as Lotus-Intel-Microsoft EMS or LIM EMS.<ref name="Mueller_1992"/><ref name="Lotus_1985"/><ref name="EMS_1987"/> It is a form of bank switching technique that allows more than the 640&nbsp;KB of RAM defined by the original IBM PC architecture, by letting it appear piecewise in a 64&nbsp;KB "window" located in the ].<ref name="Ross_1995"/> The 64&nbsp;KB is divided into four 16&nbsp;KB "pages" which can each be independently switched. Some ]s made use of this, and though EMS is obsolete, the feature is nowadays ] by later ] ]s to provide backwards compatibility with those programs.


The later ] (XMS), also now obsolete, is a standard for, in principle, simulating bank switching for memory above 1&nbsp;MB (called "]"), which is not directly addressable in the ] of ] processors in which MS-DOS runs. XMS allows extended memory to be copied anywhere in conventional memory, so the boundaries of the "banks" are not fixed, but in every other way it works like the bank switching of ], from the perspective of a program that uses it. Later versions of MS-DOS (starting circa version 5.0) included the EMM386 driver, which simulates EMS memory using XMS, allowing programs to use extended memory even if they were written for EMS. ] emulates XMS also, for those programs that require it.
In 1985 the companies ] and ] introduced ] Specification (EMS) 3.0 for use in ] computers running ]. ] joined for versions 3.2 in 1986 and 4.0 in 1987 and the specification became known as Lotus-Intel-Microsoft EMS or LIM EMS.<ref name="Mueller92"/><ref name="1-2-3" /><ref name="EMS" /> It is a form of bank switching technique that allows more than the 640 KB of RAM defined by the original IBM PC architecture, by letting it appear piecewise in a 64 KB "window" located in the ].<ref name="Ross" /> The 64 KB is divided into four 16 KB "pages" which can each be independently switched. Some ]s made use of this, and though EMS is obsolete, the feature is nowadays ] by later ] ]s to provide backwards compatibility with those programs.

The later ] (XMS), also now obsolete, is a standard for, in principle, simulating bank switching for memory above 1 MB (called "]"), which is not directly addressable in the ] of ] processors in which MS-DOS runs. XMS allows extended memory to be copied anywhere in conventional memory, so the boundaries of the "banks" are not fixed, but in every other way it works like the bank switching of ], from the perspective of a program that uses it. Later versions of MS-DOS (starting circa version 5.0) included the EMM386 driver, which simulates EMS memory using XMS, allowing programs to use extended memory even if they were written for EMS. ] emulates XMS also, for those programs that require it.


== Video game consoles == == Video game consoles ==
Bank switching was also used in some ]s.<ref name="Carey_2002"/> The ], for instance, could only address 4&nbsp;KB of ROM, so later 2600 ]s contained their own bank switching hardware in order to permit the use of more ROM and thus allow for more sophisticated games (via more program code and, equally important, larger amounts of game data such as graphics and different game stages).<ref name="Grand_2004"/> The ] contained a modified ] but its cartridges sometimes contained a ] or more of ROM, addressed via bank switching called a ]. ] cartridges used a chip called MBC (Memory Bank Controller), which not only offered ROM bank switching, but also cartridge ] bank switching, and even access to such peripherals as ] or rumble motors. Bank switching was still being used on later game systems. Several Sega ] cartridges, such as ] were over 4&nbsp;MB in size and required the use of this technique (4&nbsp;MB being the maximum address size).

Bank switching was also used in some ]s.<ref name="Carey" /> The ], for instance, could only address 4 KB of ROM, so later 2600 ]s contained their own bank switching hardware in order to permit the use of more ROM and thus allow for more sophisticated games (via more program code and, equally important, larger amounts of game data such as graphics and different game stages).<ref name="Grand" /> The ] contained a modified ] but its cartridges sometimes contained a ] or more of ROM, addressed via bank switching called a ]. ] cartridges used a chip called MBC (Memory Bank Controller), which not only offered ROM bank switching, but also cartridge SRAM bank switching, and even access to such peripherals as ] or rumble motors. Bank switching was still being used on later game systems. Several Sega ] cartridges were over 4MB in size and required the use of this technique{{Citation needed|date=April 2010|reason=I couldn't find any game that was above 4MB. Please list such games, or remove the Mega Drive/Genesis from this list.}} (4MB being the maximum address size).
The ] handheld from Gamepark Holdings uses bank switching in order to control the start address (or memory offset) for the second processor. The ] handheld from Gamepark Holdings uses bank switching in order to control the start address (or memory offset) for the second processor.


== Video processing == == Video processing ==

In some types of computer ]s, the related technique of ] may be used to improve video performance. In this case, while the processor is updating the contents of one set of physical memory locations, the video generation hardware is accessing and displaying the contents of a second set. When the processor has completed its update, it can signal to the ] to swap active banks, so that the transition visible on screen is free of artifacts or distortion. In this case, the processor may have access to all the memory at once, but the video display hardware is bank-switched between parts of the video memory. If the two (or more) banks of video memory contain slightly different images, rapidly cycling (page-flipping) between them can create animation or other visual effects that the processor might otherwise be too slow to carry out directly. In some types of computer ]s, the related technique of ] may be used to improve video performance. In this case, while the processor is updating the contents of one set of physical memory locations, the video generation hardware is accessing and displaying the contents of a second set. When the processor has completed its update, it can signal to the ] to swap active banks, so that the transition visible on screen is free of artifacts or distortion. In this case, the processor may have access to all the memory at once, but the video display hardware is bank-switched between parts of the video memory. If the two (or more) banks of video memory contain slightly different images, rapidly cycling (page-flipping) between them can create animation or other visual effects that the processor might otherwise be too slow to carry out directly.


== Alternative and successor techniques == == Alternative and successor techniques ==

Bank switching was later supplanted by ] in many ], which in turn gave way to ] ]s. In embedded systems, however, bank switching is still often used for its simplicity, low cost, and often better adaptation to those contexts than to general purpose computing. Bank switching was later supplanted by ] in many ], which in turn gave way to ] ]s. In embedded systems, however, bank switching is still often used for its simplicity, low cost, and often better adaptation to those contexts than to general purpose computing.


== See also == == See also ==

* ], an example of bank switching on the ] * ], an example of bank switching on the ]
* ]


== References == == References ==
{{reflist|refs=

<ref name="Aspinall_1978">{{cite book |editor-first=D. |editor-last=Aspinall |title=The Microprocessor and its application: an advanced course |publisher=CUP Archive |date=1978 |isbn=0-521-22241-9 |pages=47–50}}</ref>
{{reflist|30em|refs=
<ref name="Bell_1971">{{cite book |author-first1=C. Gordon |author-last1=Bell |author-first2=Allen |author-last2=Newell |title=Computer structures: readings and examples |url=https://archive.org/details/computerstructur00bellrich |url-access=limited |publisher=] |date=1971 |pages=}}</ref>
<ref name="Aspinall">{{ citation | author = D. Aspinall (ed) | title = The Microprocessor and its application: an advanced course | publisher = CUP Archive | year = 1978 | ISBN = 0-521-22241-9 | pp = 47–50 }}</ref>
<ref name="Heath_2003">{{cite book |author-first=Steve |author-last=Heath |title=Embedded systems design |url=https://archive.org/details/embeddedsystemsd00heat |url-access=limited |publisher=Newnes |date=2003 |isbn=0-7506-5546-1 |pages=}}</ref>
<ref name="Bell">{{ citation |author1=C. Gordon Bell |author2=Allen Newell | title = Computer structures: readings and examples | publisher = Mc Graw Hill | year = 1971 | pp = 156 }}</ref>
<ref name="Mueller_1992">{{cite book |author-first=Scott |author-last=Mueller |title=Upgrading and Repairing PCs |edition=2 |publisher=Que Books |date=1992 |isbn=0-88022-856-3 |pages= |url=https://archive.org/details/upgradingrepairi0000muel_2ndedition/page/699 |access-date=2020-02-08 }}</ref>
<ref name="Heath03">{{ citation | author = Steve Heath | title = Embedded systems design | publisher = Newnes | year = 2003 | ISBN = 0-7506-5546-1 | pp = 242 }}</ref>
<ref name="Mueller92">{{ citation | author = Scott Mueller | title = Upgrading and Repairing PCs, Second Edition | publisher = Que Books | year = 1992 | ISBN = 0-88022-856-3 | pp = 699–700 }}</ref> <ref name="Freiberger_1982">{{cite news |author-first=Paul |author-last=Freiberger |author-link=Paul Freiberger |title=Digital Research offers CP/M upgrade |newspaper=] |date=1982-10-25 |pages=1}}</ref>
<ref name="Freiberger">{{ citation | author = Paul Freiberger | title = Digital Research offers CP/M upgrade | publisher = InfoWorld | date = October 25, 1982 | pp = 1 }}</ref> <ref name="Lotus_1985">{{cite news |title=New 1-2-3 Gets 4 Megabytes of Memory, Lotus, Intel Break PC DOS Memory Barrier |newspaper=] |date=1985-04-29}}</ref>
<ref name="1-2-3">{{ citation | title = New 1-2-3 Gets 4 Megabytes of Memory, Lotus, Intel Break PC-DOS Memory Barrier | publisher = InfoWorld | date = April 29, 1985 }}</ref> <ref name="EMS_1987">{{cite news |title=EMS Update Gives DOS Improved Multitasking |newspaper=] |date=1987-08-17}}</ref>
<ref name="EMS">{{ citation | title = EMS Update Gives DOS Improved Multitasking | publisher = InfoWorld | date = August 17, 1987 }}</ref> <ref name="Ross_1995">{{cite book |editor-first=Paul W. |editor-last=Ross |title=The Handbook of Software for Engineers and Scientists |publisher=] |date=1995 |isbn=0-8493-2530-7 |pages=26}}</ref>
<ref name="Carey_2002">{{cite book |author-first=Brian |author-last=Sinofsky |editor-first=Charles W. |editor-last=Carey |title=American inventors, entrepreneurs & business visionaries |publisher=] |date=2002 |isbn=0-8160-4559-3 |pages= |url=https://archive.org/details/americaninventor00care_0/page/322 |access-date=2020-02-08 }}</ref>
<ref name="Ross">{{ citation | author = Paul W. Ross (ed.) | title = The Handbook of Software for Engineers and Scientists | publisher = CRC Press | year = 1995 | ISBN = 0-8493-2530-7 | pp = 26 }}</ref>
<ref name="Grand_2004">{{cite book |author-first1=Joe |author-last1=Grand |author-first2=Ryan |author-last2=Russell |author-first3=Kevin D. |author-last3=Mitnick |title=Hardware hacking: have fun while voiding your warranty |publisher=Syngress |date=2004 |isbn=1-932266-83-6 |pages= |url=https://archive.org/details/hardwarehackingh00gran/page/229 |access-date=2020-02-08 }}</ref>
<ref name="Carey">{{ citation | author = ''Brian Sinofsky'' in Charles W. Carey | title = American inventors, entrepreneurs & business visionaries | publisher = Infobase Publishing | year = 2002 | ISBN = 0-8160-4559-3 | pp = 322–324 }}</ref>
<ref name="Garland_1977">{{cite journal |author-last=Garland |author-first=Harry |title=Design Innovations in Personal Computers |journal=Computer |publisher=] |date=March 1977 |volume=10 |issue=3 |doi=10.1109/c-m.1977.217669 |page=25 |s2cid=32243439 |url=http://www.computer.org/csdl/mags/co/1977/03/01646402-abs.html |access-date=2020-02-08 |quote=An eight-position DIP switch on such cards is used to select one (or more) of eight banks of memory.}}</ref>
<ref name="Grand">{{ citation |author1=Joe Grand |author2=Ryan Russell |author3=Kevin D. Mitnick | title = Hardware hacking: have fun while voiding your warranty | publisher = Syngress | year = 2004 | ISBN = 1-932266-83-6 | pp = 229 }}</ref>
<ref name="Garland_1979">{{cite book |author-last=Garland |author-first=Harry |title=Introduction to Microprocessor System Design |date=1979 |publisher=] |isbn=0-07-022871-X |page= |url-access=registration |url=https://archive.org/details/introductiontomi00garl/page/93 |access-date=2020-02-08 |quote=With memory bank select, memory space is arranged in a number of separate banks of up to 64K each.}}</ref>
<ref name="Hogan_1981">{{cite news |author-last=Hogan |author-first=Thom |title=Share and Share Alike: Multiuser Hardware Explained |newspaper=] |date=1981-06-08 |volume=3 |issue=11 |page=18 |url=https://books.google.com/books?id=zD0EAAAAMBAJ&pg=PA18 |access-date=2020-02-08 |quote=Cromemco was the first microcomputer manufacturer to refine and exploit bank switching.}}</ref>
}} }}


== External links == == External links ==
* * {{cite web |url=http://www.folklore.org/StoryView.py?project=Macintosh&story=Well_See_About_That.txt |title=Story about bank switching in the Apple II.|archive-url=https://web.archive.org/web/20201212051857/http://www.folklore.org/StoryView.py?project=Macintosh&story=Well_See_About_That.txt|archive-date=12 December 2020
|url-status=live
*
}}
* {{cite web |url=http://www.wisegeek.com/what-is-bank-switching.htm |title=What Is Bank Switching?|date=2 February 2024 }}


] ]

Latest revision as of 04:47, 14 July 2024

A technique to increase the amount of usable memory Not to be confused with Paging.

A hypothetical memory map of bank-switched memory for a processor that can only address 64 KB. This scheme shows 200 KB of memory, of which only 64 KB can be accessed at any time by the processor. The operating system must manage the bank-switching operation to ensure that program execution can continue when part of memory is not accessible to the processor.

Bank switching is a technique used in computer design to increase the amount of usable memory beyond the amount directly addressable by the processor instructions. It can be used to configure a system differently at different times; for example, a ROM required to start a system from diskette could be switched out when no longer needed. In video game systems, bank switching allowed larger games to be developed for play on existing consoles.

Bank switching originated in minicomputer systems. Many modern microcontrollers and microprocessors use bank switching to manage random-access memory, non-volatile memory, input-output devices and system management registers in small embedded systems. The technique was common in 8-bit microcomputer systems. Bank-switching may also be used to work around limitations in address bus width, where some hardware constraint prevents straightforward addition of more address lines, and to work around limitations in the ISA, where the addresses generated are narrower than the address bus width. Some control-oriented microprocessors use a bank-switching technique to access internal I/O and control registers, which limits the number of register address bits that must be used in every instruction.

Unlike memory management by paging, data is not exchanged with a mass storage device like disk storage. Data remains in quiescent storage in a memory area that is not currently accessible to the processor (although it may be accessible to the video display, DMA controller, or other subsystems of the computer) without the use of special prefix instructions.

Technique

Bank switching can be considered as a way of extending the address space of processor instructions with some register. Examples:

  • The follow-on system to a processor with a 12 bit address has a 15 bit address bus, but there is no way to directly specify the high three bits on the address bus. Internal bank registers can be used to provide those bits.
  • The follow-on system to a processor with a 15 bit address has an 18 bit address bus, but legacy instructions only have 15 address bits; internal bank registers can be used to provide those bits. Some new instructions can explicitly specify the bank.
  • A processor with a 16-bit external address bus can only address 2 = 65536 memory locations. If an external latch was added to the system, it could be used to control which of two sets of memory devices, each with 65536 addresses, could be accessed. The processor could change which set is in current use by setting or clearing the latch bit.
    The latch can be set or cleared by the processor in several ways; a particular memory address may be decoded and used to control the latch, or, in processors with separately-decoded I/O addresses, an output address may be decoded. Several bank-switching control bits could be gathered into a register, approximately doubling the available memory spaces with each additional bit in the register.
    Because the external bank-selecting latch (or register) is not directly connected with the program counter of the processor, it does not automatically change state when the program counter overflows; this cannot be detected by the external latch since the program counter is an internal register of the processor. The extra memory is not seamlessly available to programs. Internal registers of the processor remain at their original length, so the processor cannot directly span all of bank-switched memory by, for example, incrementing an internal register. Instead the processor must explicitly do a bank-switching operation to access large memory objects. There are other limitations. Generally a bank-switching system will have one block of program memory that is common to all banks; no matter which bank is currently active, for part of the address space only one set of memory locations will be used. This area would be used to hold code that manages the transitions between banks, and also to process interrupts.

Often a single database spans several banks, and the need arises to move records between banks (as for sorting). If only one bank is accessible at a time, it would be necessary to move each byte twice: first into the common memory area, perform a bank switch to the destination bank, and then actually to move the byte into the destination bank. If the computer architecture has a DMA engine or a second CPU, and its bank access restrictions differ, whichever subsystem can transfer data directly between banks should be used.

Unlike a virtual memory scheme, bank-switching must be explicitly managed by the running program or operating system; the processor hardware cannot automatically detect that data not currently mapped into the active bank is required. The application program must keep track of which memory bank holds a required piece of data, and then call the bank-switching routine to make that bank active. However, bank-switching can access data much faster than, for example, retrieving the data from disk storage.

Microcomputer use

Bank select switch on Cromemco memory board was used to map the memory into one or more of eight distinct 64 KB banks.

Processors with 16-bit addressing (8080, Z80, 6502, 6809, etc.) commonly used in early video game consoles and home computers can directly address only 64 KB. Systems with more memory had to divide the address space into a number of blocks that could be dynamically mapped into parts of a larger address space. Bank switching was used to achieve this larger address space by organizing memory into separate banks of up to 64 KB each. Blocks of various sizes were switched in and out via bank select registers or similar mechanisms. Cromemco was the first microcomputer manufacturer to use bank switching, supporting 8 banks of 64 KB in its systems.

When using bank switching some caution was required in order not to corrupt the handling of subroutine calls, interrupts, the machine stack, and so on. While the contents of memory temporarily switched out from the CPU was inaccessible to the processor, it could be used by other hardware, such as video display, DMA, I/O devices, etc. CP/M-80 3.0 released in 1983 and the Z80-based TRS-80s the Model 4 and Model II supported bank switching to allow use of more than the 64 KB of memory that the 8080 or Z80 processor could address.

Bank switching allowed extra memory and functions to be added to a computer design without the expense and incompatibility of switching to a processor with a wider address bus. For example, the C64 used bank switching to allow for a full 64 KB of RAM and still provide for ROM and memory-mapped I/O as well. The Atari 130XE could allow its two processors (the 6502 and the ANTIC) to access separate RAM banks, allowing programmers to make large playfields and other graphic objects without using up the memory visible to the CPU.

Microcontrollers

Microcontrollers (microprocessors with significant input/output hardware integrated on-chip) may use bank switching, for example, to access multiple configuration registers or on-chip read/write memory. An example is the PIC microcontroller. This allows short instruction words to save space during routine program execution, at the cost of extra instructions required to access relatively infrequently used registers, such as those used for system configuration at start-up.

The IBM PC

Expanded memory in the IBM PC

In 1985, the companies Lotus and Intel introduced Expanded Memory Specification (EMS) 3.0 for use in IBM PC compatible computers running MS-DOS. Microsoft joined for versions 3.2 in 1986 and 4.0 in 1987 and the specification became known as Lotus-Intel-Microsoft EMS or LIM EMS. It is a form of bank switching technique that allows more than the 640 KB of RAM defined by the original IBM PC architecture, by letting it appear piecewise in a 64 KB "window" located in the Upper Memory Area. The 64 KB is divided into four 16 KB "pages" which can each be independently switched. Some computer games made use of this, and though EMS is obsolete, the feature is nowadays emulated by later Microsoft Windows operating systems to provide backwards compatibility with those programs.

The later eXtended Memory Specification (XMS), also now obsolete, is a standard for, in principle, simulating bank switching for memory above 1 MB (called "extended memory"), which is not directly addressable in the Real Mode of x86 processors in which MS-DOS runs. XMS allows extended memory to be copied anywhere in conventional memory, so the boundaries of the "banks" are not fixed, but in every other way it works like the bank switching of EMS, from the perspective of a program that uses it. Later versions of MS-DOS (starting circa version 5.0) included the EMM386 driver, which simulates EMS memory using XMS, allowing programs to use extended memory even if they were written for EMS. Microsoft Windows emulates XMS also, for those programs that require it.

Video game consoles

Bank switching was also used in some video game consoles. The Atari 2600, for instance, could only address 4 KB of ROM, so later 2600 game cartridges contained their own bank switching hardware in order to permit the use of more ROM and thus allow for more sophisticated games (via more program code and, equally important, larger amounts of game data such as graphics and different game stages). The Nintendo Entertainment System contained a modified 6502 but its cartridges sometimes contained a megabit or more of ROM, addressed via bank switching called a Multi-Memory Controller. Game Boy cartridges used a chip called MBC (Memory Bank Controller), which not only offered ROM bank switching, but also cartridge SRAM bank switching, and even access to such peripherals as infrared links or rumble motors. Bank switching was still being used on later game systems. Several Sega Mega Drive cartridges, such as Super Street Fighter II were over 4 MB in size and required the use of this technique (4 MB being the maximum address size). The GP2X handheld from Gamepark Holdings uses bank switching in order to control the start address (or memory offset) for the second processor.

Video processing

In some types of computer video displays, the related technique of double buffering may be used to improve video performance. In this case, while the processor is updating the contents of one set of physical memory locations, the video generation hardware is accessing and displaying the contents of a second set. When the processor has completed its update, it can signal to the video display hardware to swap active banks, so that the transition visible on screen is free of artifacts or distortion. In this case, the processor may have access to all the memory at once, but the video display hardware is bank-switched between parts of the video memory. If the two (or more) banks of video memory contain slightly different images, rapidly cycling (page-flipping) between them can create animation or other visual effects that the processor might otherwise be too slow to carry out directly.

Alternative and successor techniques

Bank switching was later supplanted by segmentation in many 16-bit systems, which in turn gave way to paging memory management units. In embedded systems, however, bank switching is still often used for its simplicity, low cost, and often better adaptation to those contexts than to general purpose computing.

See also

References

  1. Aspinall, D., ed. (1978). The Microprocessor and its application: an advanced course. CUP Archive. pp. 47–50. ISBN 0-521-22241-9.
  2. Bell, C. Gordon; Newell, Allen (1971). Computer structures: readings and examples. McGraw Hill. pp. 156.
  3. "Storage Control". Control Data 160-A Computer Programming Manual (PDF). CDC. March 1963. p. 2-09. 145e.
  4. Control Data 3600 Computer System Reference Manual (PDF). CDC. 60021300E.
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  6. ^ Mueller, Scott (1992). Upgrading and Repairing PCs (2 ed.). Que Books. pp. 699–700. ISBN 0-88022-856-3. Retrieved 2020-02-08.
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  8. Garland, Harry (1979). Introduction to Microprocessor System Design. McGraw-Hill Book Company. p. 93. ISBN 0-07-022871-X. Retrieved 2020-02-08. With memory bank select, memory space is arranged in a number of separate banks of up to 64K each.
  9. Hogan, Thom (1981-06-08). "Share and Share Alike: Multiuser Hardware Explained". InfoWorld. Vol. 3, no. 11. p. 18. Retrieved 2020-02-08. Cromemco was the first microcomputer manufacturer to refine and exploit bank switching.
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  11. "New 1-2-3 Gets 4 Megabytes of Memory, Lotus, Intel Break PC DOS Memory Barrier". InfoWorld. 1985-04-29.
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  13. Ross, Paul W., ed. (1995). The Handbook of Software for Engineers and Scientists. CRC Press. p. 26. ISBN 0-8493-2530-7.
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