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{{short description|Type of data transfer}}
{{cleanup-date|March 2005}}
{{more citations needed|date=August 2019}}
{{Use American English|date=May 2024}}


] |isbn=978-0-201-14460-4 |lccn=77-90165 |pages=247–253 |access-date=2022-12-29 |archive-url=https://web.archive.org/web/20160526172151/https://textfiles.meulie.net/bitsaved/Books/Mackenzie_CodedCharSets.pdf |archive-date=May 26, 2016 |url-status=live |df=mdy-all }}</ref> D<sub>0</sub> is received first via serial transmission. All bits are received simultaneously via parallel transmission.]]
In ] and ], '''serial communications''' is the process of sending data one ] at one time, sequentially, over a ] or ]. This is in contrast to ], where all the bits of each ] are sent together. Serial communications is used for all long-haul communications and most ]s, where the cost of ] and ] difficulties make parallel communications impractical. Serial computer busses are becoming more common as improved technology enables them to transfer data at higher speeds.


In ] and ], '''serial communication''' is the process of sending ] one ] at a time, sequentially, over a ] or ]. This is in contrast to ], where several bits are sent as a whole, on a link with several parallel channels.
==Time division multiplexed systems==


]
Almost all long-haul digital communication channels are leased from telephone carriers. Digital telephone systems use synchronous '''frames''' of bits that repeat 8000 times per second. These usually have a one or a few bits that form a pattern to enable the system to "synch", and locate the start of the frame. Blocks of data are then identified by counting bits or groups of 8 bits from the start of the frames; this scheme is called ].
Serial communication is used for all ] and most ]s, where the cost of ] and ] difficulties make parallel communication impractical. Serial computer buses have become more common even at shorter distances, as improved ] and transmission speeds in newer serial technologies have begun to outweigh the parallel bus's advantage of simplicity (no need for serializer and deserializer, or ]) and to outstrip its disadvantages (], interconnect density). The migration from ] to ] (PCIe) is an example.


Modern high speed serial interfaces such as PCIe<ref>{{cite web |url=https://www.theregister.com/2022/01/12/final_pcie_60_specs_released/ |title=Final PCIe 6.0 specs unleashed: 64 GTps link speed incoming... with products to follow in 2023 |first=Dan |last=Robinson |date=12 January 2022 |website=]}}</ref><ref>{{cite web | url=https://www.anandtech.com/show/21335/full-draft-of-pcie-70-spec-available-512-gbs-over-pcie-x16-incoming | title=PCIe 7.0 Draft 0.5 Spec Available: 512 GB/S over PCIe x16 on Track for 2025 }}</ref><ref>{{cite web | url=https://arstechnica.com/gadgets/2022/01/pci-express-6-0-spec-is-finalized-doubling-bandwidth-for-ssds-gpus-and-more/ | title=PCIe 5.0 is just beginning to come to new PCS, but version 6.0 is already here | date=12 January 2022 }}</ref> send data several bits at a time using modulation/encoding techniques such as ] which groups 2 bits at a time into a single symbol, and several symbols are still sent one at the time. This replaces PAM2 or non return to zero (NRZ) which only sends one bit at a time, or in other words one bit per symbol.<ref>{{cite book | url=https://books.google.com/books?id=wnGDBAAAQBAJ&dq=serial+pam4+signals&pg=PA9 | isbn=978-0-12-800671-9 | title=Handbook of Serial Communications Interfaces: A Comprehensive Compendium of Serial Digital Input/Output (I/O) Standards | date=21 August 2015 | publisher=Newnes }}</ref><ref>{{cite web | url=https://www.signalintegrityjournal.com/articles/1151-pam4-for-better-and-worse | title=PAM4: For Better and Worse &#124; 2019-02-26 &#124; Signal Integrity Journal }}</ref><ref>{{cite web | url=https://semiengineering.com/knowledge_centers/communications-io/off-chip-communications/pam-4-signaling/ | title=PAM-4 Signaling }}</ref><ref>{{cite conference |url=https://www.xilinx.com/publications/events/designcon/2016/slides-pam4signalingfor56gserial-zhang-designcon.pdf |title=PAM4 Signaling for 56G Serial Link Applications − A Tutorial |first1=Hongtao |last1=Zhang |first2=Brandon |last2=Jiao |first3=Yu |last3=Liao |first4=Geoff |last4=Zhang |conference=DesignCon 2016}}</ref><ref>{{cite web |url=https://download.tek.com/document/PAM4-Signaling-in-High-Speed-Serial-Technology_55W-60273.pdf |title=PAM4 Signaling in High-Speed Serial Technology: Test, Analysis, and Debug |type=application note |publisher=]}}</ref><ref>{{cite book | url=https://books.google.com/books?id=JljBDwAAQBAJ&dq=pam4+symbol&pg=PA54 | isbn=978-3-03921-792-2 | title=Advanced DSP Techniques for High-Capacity and Energy-Efficient Optical Fiber Communications | date=3 December 2019 | last1=Pan | first1=Zhongqi | last2=Yue | first2=Yang }}</ref><ref>{{cite book | url=https://books.google.com/books?id=MlruDwAAQBAJ&dq=pam4+symbol&pg=PA944 | isbn=978-1-119-52149-5 | title=Essentials of Modern Communications | date=4 August 2020 | publisher=John Wiley & Sons }}</ref><ref>{{cite journal |url=https://www.researchgate.net/figure/Eye-diagrams-of-PAM-2-4-8-with-normalized-vertical-full-swing-level-Peak-to-peak-swings_fig2_361960252 |title=Design Space Exploration of Single-Lane OFDM-Based Serial Links for High-Speed Wireline Communications |first=Gain |last=Kim |at=Figure 2 |journal=IEEE Open Journal of Circuits and Systems |issn=2644-1225 |volume=3 |issue=1 |date=January 2022 |doi=10.1109/OJCAS.2022.3189550|doi-access=free }}</ref> The symbols are sent at a speed known as the symbol rate or the baud rate.<ref>{{cite web | url=https://www.edn.com/eye-diagrams-the-tool-for-serial-data-analysis/ | title=Eye diagrams: The tool for serial data analysis | date=4 June 2019 }}</ref><ref>{{cite web | url=https://www.rfwireless-world.com/Terminology/Advantages-and-disadvantages-of-PAM4-modulation.html | title=Advantages of PAM4 modulation &#124; Disadvantages PAM4 signaling }}</ref><ref>{{cite web | url=https://www.edn.com/generate-pam4-signals-for-receiver-compliance-testing/ | title=Generate PAM4 signals for receiver compliance testing | date=20 September 2016 }}</ref><ref>{{cite book | url=https://books.google.com/books?id=L1YIEQAAQBAJ&dq=pam4+symbol+rate&pg=PA16 | isbn=978-1-040-01179-9 | title=Complex Digital Hardware Design | date=9 May 2024 | publisher=CRC Press }}</ref>
This repeating frame is far more efficient than a teletype-style ], because there is less ]. Telephone systems range from ] lines, which have a frame of 24 bits, and one synch bit, to ] frames, whose frame contains several thousand bits, and has about 1% synch bits distributed in the super frame. The advantage of these systems is that the bit pattern can be repeated by any type of ], making the data independent of the transmission medium.


==Cables==
In telephone systems, these data formats travel in physical media arranged in loops. The loops may cover many cities, or a loop may be a single transmission link from one region to another.
Many serial communication systems were originally designed to transfer data over relatively large distances through some sort of ].


Practically all long-distance communication transmits data one bit at a time, rather than in parallel, because it reduces the cost of the cable. The cables that carry this data (other than "the" serial cable) and the ] they plug into are usually referred to with a more specific name, to reduce confusion.
Routers transfer blocks as small as a single phone conversation from link to another.


Keyboard and mouse cables and ports are almost invariably serial—such as ], ] and ].
Generally, each channel of each node on the loop is allocated block(s) of the repeating frame. When a router receives data for a channel, it consumes data from this block of the frame. When it transmits data, it fills this block with the data it generates. In this way, a single fast channel is broken into several slower channels.


The cables that carry digital video are also mostly serial—such as ] plugged into a ] port, a ] plugged into a USB port or ], ] connecting an ] to a ] port, ], digital telephone lines (ex. ]), etc.
These long-haul systems usually transmit ] protocol data using a technique called ].


Other such cables and ports, transmitting data one bit at a time, include ], ], Ethernet cable plugged into ]s, the ] using previously reserved pins of the ] or the ] or the ] port.
==Asynchronous transfer mode==

In the ]s, the Doelz company developed a semi-synchronous serial communication system. It used short synchronous frames on a physical loop, but the routing equipment was permitted to remove, store and delay lower priority data if it had higher-priority data. The crucial advantage of the Doelz network design was that low priority, high reliability digital network data from computers could be inexpensively combined with low reliability high priority data such as pulse-code modulated voice.

AT&T researchers appear to have borrowed significant concepts from Doelz in order to develop a similar system, "]" (ATM). This also uses repeating small frames of fixed-size packets. The packets likewise included routing information in the form of channel identification indexes, and optional error correction data.

As a primary protocol or transmission protocol, ATM has lost the competition to the internet protocols, which have substantially lower overhead per packet (<1% for IP).

ATM is widely used as a backbone protocol in routers.

On long-haul networks, ATM is often reformatted into frame relay.

==Teletype systems==

Standard ] systems evolved as an automated ] system called ]. Originally, a rotating mechanical commutator (a rotating switch) was started by a "start bit". The commutator would distribute the other bits to set ]s that would pull on ]s which would cause the mechanism to print a figure on paper. The routing was automated with rotary electromechanical dialing systems like those used in early telephohe systems. When ]s became commonplace, these serial communication systems were adapted using I/O devices called ]s that used ]s. The development of communications hardware had a deep continuing impact on the nature of software and operating systems, both of which usually arrange data as sequences of characters.


==Serial buses== ==Serial buses==
] connector (] DB-25 variant)]]
Many communication systems were generally designed to connect two integrated circuits on the same ], connected by ]s on that board (rather than external cables).


]s are more expensive when they have more pins. To reduce the pins, many ICs use a ] to transfer data when speed is not important. Some examples of such low-cost serial busses include ], ], and ]. ]s are more expensive when they have more pins. To reduce the number of pins in a package, many ICs use a serial bus to transfer data when speed is not important. Some examples of such low-cost lower-speed serial buses include ], ], ], ], ], ], and ]. Higher-speed serial buses include ], ] and ].


==Serial versus parallel== ==Serial versus parallel==
The communications links across which computers&mdash;or parts of computers&mdash;talk to one another may be either serial or parallel. A parallel link transmits several streams of data (perhaps representing particular bits of a stream of bytes) along multiple channels (wires, printed circuit tracks, optical fibres, etc.); a serial link transmits a single stream of data. The communication links, across which computers (or parts of computers) talk to one another, may be either serial or parallel. A parallel link transmits several streams of data simultaneously along multiple channels (e.g., wires, printed circuit tracks, or optical fibers); whereas, a serial link transmits only a single stream of data. The rationale for parallel communication was the added benefit of having ] to the 8-bit or 16-bit registry addresses at a time where mapping direct data lanes was more convenient and faster than synchronizing data serially.{{cn|date=May 2024}}


At first sight it would seem that a serial link must be inferior to a parallel one, because it can transmit less data on each clock tick. However, it is often the case that serial links can be clocked considerably faster than parallel links, and achieve a higher data rate. A number of factors allow serial to be clocked at a greater rate: Although a serial link may seem inferior to a parallel one, since it can transmit less data per clock cycle, it is often the case that serial links can be clocked considerably faster than parallel links in order to achieve a higher data rate. Several factors allow serial to be clocked at a higher rate:
*] between different channels is not an issue (for unclocked ] links). This can be caused by mismatched wire or conductor lengths.<ref name="cse378-lecture-24">{{cite web |url=https://courses.cs.washington.edu/courses/cse378/11wi/lectures/lec24.pdf |title=Lecture 24 |work=CSE378: Machine Organization & Assembly Language}}</ref><ref>{{cite book | url=https://books.google.com/books?id=BxptEAAAQBAJ | title=Modern Computer Architecture and Organization: Learn x86, ARM, and RISC-V architectures and the design of smartphones, PCS, and cloud servers | isbn=978-1-80323-823-4 | last1=Ledin | first1=Jim | last2=Farley | first2=Dave | date=4 May 2022 | publisher=Packt Publishing }}</ref>
*] between different channels is not an issue (for unclocked serial links)
*A serial connection requires fewer interconnecting cables (e.g. wires/fibres) and hence occupies less space. The extra space allows for better isolation of the channel from its surroundings *A serial connection requires fewer interconnecting cables (e.g., wires/fibers) and hence occupies less space. The extra space allows for better isolation of the channel from its surroundings.
*] is less of an issue, because there are fewer conductors in close proximity. *] is less of an issue, because there are fewer conductors in proximity.<ref name="cse378-lecture-24" />
*Budgets for power use, power dissipation, cable cost, component cost, IC die area, PC board area, ESD protection, etc. can be focused on a single link.


The transition from parallel to serial buses was allowed by ] which allowed for the incorporation of SerDes in integrated circuits.<ref>{{cite book | url=https://books.google.com/books?id=aUCgNOpyUbgC&dq=parallel++serial++serdes+moore%27s+law&pg=PA275 | isbn=978-1-4020-7496-7 | title=The Boundary — Scan Handbook | date=30 June 2003 | publisher=Springer }}</ref>
In many cases, serial is a better option because it is cheaper to implement. Many ICs have serial interfaces, as opposed to parallel ones, so that they have fewer pins and are therefore cheaper.
An electrical serial link only requires a pair of wires, whereas a parallel link requires several. Thus serial links can save on costs (also known as the ]). ] uses length-matched wires or conductors and are used in high speed serial links.<ref>{{cite book | url=https://books.google.com/books?id=BxptEAAAQBAJ | title=Modern Computer Architecture and Organization: Learn x86, ARM, and RISC-V architectures and the design of smartphones, PCS, and cloud servers | isbn=978-1-80323-823-4 | last1=Ledin | first1=Jim | last2=Farley | first2=Dave | date=4 May 2022 | publisher=Packt Publishing }}</ref> Length-matching is easier to perform on serial links as they require fewer conductors.


In many cases, serial is cheaper to implement than parallel. Many ]s have serial interfaces, as opposed to parallel ones, so that they have fewer pins and are therefore less expensive.
==Examples of serial communication architectures==

*] ]
==Examples of architectures==
*] (low-speed, implemented by ])
{{Div col|colwidth=30em}}
*]
*] Avionics Digital Video Bus
*] (moderate-speed, for connecting computers to peripherals)
*] (Joe Decuir credits his work on Atari SIO as the basis of USB)
*] BSC - Binary Synchronous Communications
*] Control Area Network Vehicle Bus
*] Used in the money transaction and point-of-sale industry
*] industrial camera protocol over Coax
*] control of theatrical lighting
*]
*] (high-speed, for connecting computers to mass storage devices)
*] *]
*]
*] (high-speed, for connecting computers to mass storage devices)
*]
*] (very high speed, broadly comparable in scope to ]) *] (very high speed, broadly comparable in scope to ])
*] multidrop serial bus
*] control of electronic musical instruments
*]
*] ]
*]
*]
*] (low-speed, implemented by ]s)
*] multidrop serial bus
*]
*] multidrop multimaster serial bus
*] industrial sensor protocol
*]
*]
*] *]
*] with serial-in and serial-out configuration
*]
*] and ] (high speed telecommunication over optical fibers)
*]
*] Spacecraft communication network
*]
*], ] and variants (high speed telecommunication over copper pairs)
*] (for connecting peripherals to computers)
*] multidrop serial bus
*] multidrop serial bus
{{Div col end}}


==See also== ==See also==

*]
* ]
* ]
* ]
* ]
* ]
* ]
* ]
* ] (HDLC)
* ]
* ]
* ]
* ]
* ]
* ] (UART)

==References==
{{Reflist}}


==External links== ==External links==
* (contains many practical examples)
*
*
*
*
* {{Webarchive|url=https://web.archive.org/web/20160308185505/http://byteparadigm.com/kb/article/aa-00255 |date=2016-03-08 }}
*
* {{Webarchive|url=https://web.archive.org/web/20180702014758/http://training-kits.appspot.com/serial-linux.html |date=2018-07-02 }}

{{Computer-bus}}
{{Bit-encoding}}


] ]
]
]
]

Revision as of 19:53, 6 November 2024

Type of data transfer
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Serial and parallel data transmission of 010010112. Standard bit sequence is least-significant-bit-first (D0 to D7 in ascending order). D0 is received first via serial transmission. All bits are received simultaneously via parallel transmission.

In telecommunication and data transmission, serial communication is the process of sending data one bit at a time, sequentially, over a communication channel or computer bus. This is in contrast to parallel communication, where several bits are sent as a whole, on a link with several parallel channels.

Standard character structure for asynchronous data communication consisting of 10 elements for a 7-bit ASCII character

Serial communication is used for all long-haul communication and most computer networks, where the cost of cable and synchronization difficulties make parallel communication impractical. Serial computer buses have become more common even at shorter distances, as improved signal integrity and transmission speeds in newer serial technologies have begun to outweigh the parallel bus's advantage of simplicity (no need for serializer and deserializer, or SerDes) and to outstrip its disadvantages (clock skew, interconnect density). The migration from PCI to PCI Express (PCIe) is an example.

Modern high speed serial interfaces such as PCIe send data several bits at a time using modulation/encoding techniques such as PAM4 which groups 2 bits at a time into a single symbol, and several symbols are still sent one at the time. This replaces PAM2 or non return to zero (NRZ) which only sends one bit at a time, or in other words one bit per symbol. The symbols are sent at a speed known as the symbol rate or the baud rate.

Cables

Many serial communication systems were originally designed to transfer data over relatively large distances through some sort of data cable.

Practically all long-distance communication transmits data one bit at a time, rather than in parallel, because it reduces the cost of the cable. The cables that carry this data (other than "the" serial cable) and the computer ports they plug into are usually referred to with a more specific name, to reduce confusion.

Keyboard and mouse cables and ports are almost invariably serial—such as PS/2 port, Apple Desktop Bus and USB.

The cables that carry digital video are also mostly serial—such as coax cable plugged into a HD-SDI port, a webcam plugged into a USB port or FireWire port, Ethernet cable connecting an IP camera to a Power over Ethernet port, FPD-Link, digital telephone lines (ex. ISDN), etc.

Other such cables and ports, transmitting data one bit at a time, include Serial ATA, Serial SCSI, Ethernet cable plugged into Ethernet ports, the Display Data Channel using previously reserved pins of the VGA connector or the DVI port or the HDMI port.

Serial buses

RS-232 connector (D-Sub DB-25 variant)

Many communication systems were generally designed to connect two integrated circuits on the same printed circuit board, connected by signal traces on that board (rather than external cables).

Integrated circuits are more expensive when they have more pins. To reduce the number of pins in a package, many ICs use a serial bus to transfer data when speed is not important. Some examples of such low-cost lower-speed serial buses include RS-232, DALI, SPI, CAN bus, I²C, UNI/O, and 1-Wire. Higher-speed serial buses include USB, SATA and PCI Express.

Serial versus parallel

The communication links, across which computers (or parts of computers) talk to one another, may be either serial or parallel. A parallel link transmits several streams of data simultaneously along multiple channels (e.g., wires, printed circuit tracks, or optical fibers); whereas, a serial link transmits only a single stream of data. The rationale for parallel communication was the added benefit of having Direct Memory Access to the 8-bit or 16-bit registry addresses at a time where mapping direct data lanes was more convenient and faster than synchronizing data serially.

Although a serial link may seem inferior to a parallel one, since it can transmit less data per clock cycle, it is often the case that serial links can be clocked considerably faster than parallel links in order to achieve a higher data rate. Several factors allow serial to be clocked at a higher rate:

  • Clock skew between different channels is not an issue (for unclocked asynchronous serial communication links). This can be caused by mismatched wire or conductor lengths.
  • A serial connection requires fewer interconnecting cables (e.g., wires/fibers) and hence occupies less space. The extra space allows for better isolation of the channel from its surroundings.
  • Crosstalk is less of an issue, because there are fewer conductors in proximity.
  • Budgets for power use, power dissipation, cable cost, component cost, IC die area, PC board area, ESD protection, etc. can be focused on a single link.

The transition from parallel to serial buses was allowed by Moore's law which allowed for the incorporation of SerDes in integrated circuits. An electrical serial link only requires a pair of wires, whereas a parallel link requires several. Thus serial links can save on costs (also known as the Bill of Materials). Differential signalling uses length-matched wires or conductors and are used in high speed serial links. Length-matching is easier to perform on serial links as they require fewer conductors.

In many cases, serial is cheaper to implement than parallel. Many ICs have serial interfaces, as opposed to parallel ones, so that they have fewer pins and are therefore less expensive.

Examples of architectures

See also

References

  1. Mackenzie, Charles E. (1980). Coded Character Sets, History and Development (PDF). The Systems Programming Series (1 ed.). Addison-Wesley Publishing Company, Inc. pp. 247–253. ISBN 978-0-201-14460-4. LCCN 77-90165. Archived (PDF) from the original on May 26, 2016. Retrieved December 29, 2022.
  2. Robinson, Dan (12 January 2022). "Final PCIe 6.0 specs unleashed: 64 GTps link speed incoming... with products to follow in 2023". The Register.
  3. "PCIe 7.0 Draft 0.5 Spec Available: 512 GB/S over PCIe x16 on Track for 2025".
  4. "PCIe 5.0 is just beginning to come to new PCS, but version 6.0 is already here". 12 January 2022.
  5. Handbook of Serial Communications Interfaces: A Comprehensive Compendium of Serial Digital Input/Output (I/O) Standards. Newnes. 21 August 2015. ISBN 978-0-12-800671-9.
  6. "PAM4: For Better and Worse | 2019-02-26 | Signal Integrity Journal".
  7. "PAM-4 Signaling".
  8. Zhang, Hongtao; Jiao, Brandon; Liao, Yu; Zhang, Geoff. PAM4 Signaling for 56G Serial Link Applications − A Tutorial (PDF). DesignCon 2016.
  9. "PAM4 Signaling in High-Speed Serial Technology: Test, Analysis, and Debug" (PDF) (application note). Tektronix.
  10. Pan, Zhongqi; Yue, Yang (3 December 2019). Advanced DSP Techniques for High-Capacity and Energy-Efficient Optical Fiber Communications. ISBN 978-3-03921-792-2.
  11. Essentials of Modern Communications. John Wiley & Sons. 4 August 2020. ISBN 978-1-119-52149-5.
  12. Kim, Gain (January 2022). "Design Space Exploration of Single-Lane OFDM-Based Serial Links for High-Speed Wireline Communications". IEEE Open Journal of Circuits and Systems. 3 (1). Figure 2. doi:10.1109/OJCAS.2022.3189550. ISSN 2644-1225.
  13. "Eye diagrams: The tool for serial data analysis". 4 June 2019.
  14. "Advantages of PAM4 modulation | Disadvantages PAM4 signaling".
  15. "Generate PAM4 signals for receiver compliance testing". 20 September 2016.
  16. Complex Digital Hardware Design. CRC Press. 9 May 2024. ISBN 978-1-040-01179-9.
  17. ^ "Lecture 24" (PDF). CSE378: Machine Organization & Assembly Language.
  18. Ledin, Jim; Farley, Dave (4 May 2022). Modern Computer Architecture and Organization: Learn x86, ARM, and RISC-V architectures and the design of smartphones, PCS, and cloud servers. Packt Publishing. ISBN 978-1-80323-823-4.
  19. The Boundary — Scan Handbook. Springer. 30 June 2003. ISBN 978-1-4020-7496-7.
  20. Ledin, Jim; Farley, Dave (4 May 2022). Modern Computer Architecture and Organization: Learn x86, ARM, and RISC-V architectures and the design of smartphones, PCS, and cloud servers. Packt Publishing. ISBN 978-1-80323-823-4.

External links

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