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Why there are only 52 bits used for addressing in PAE mode?

First, and most important of all, as we know in PAE mode physical memroy address is aligned in 4KiB boundary. So the 12 bits of right most bits are implicitly 0, existing but not presented in the PDE, PTE, PPDE and so forth. Even though they are not presented, but the remaining bits position are corresponding to them in PDE, PTE, PPDE and so forth, leaving the 12 right most bits used for flags. This is important, and always arise confusion. Now you might ask why there is only 51 or 52 bits for addressing physical memroy but not the whole 64 bits. Yes, it should have been extended into 64 bits, but as the first PAE implementation, no needs for 64 bit address, so the 12 left most bits( or 12 most significant bits) are reserved for later use. NX bit in AMD64 is an example. CPU manufacture wants to use these bits for special feature rather than addressing the physical memory. So 64 - 12 = 52, yes, 52 bits are the upper boundary for the current physical memory addressing, not 51 bit. For this you can reference Page 126, AMD64 Architecture Programmer’s Manual Volume 2: System Programming(24593.pdf). —Preceding unsigned comment added by Janagewen (talk • contribs) 13:51, 9 January 2009 (UTC)

I think you are confused on one point: The NX bit is not part of the physical address. It is in the page table (or page directory, etc.) entry, wherein it is just as permanently reserved as the low-order 12 bits (page present bit, read-only bit, privileged access bit, etc.). Although the NX bit is indeed interpreted by the hardware, 11 more bits at the high end are also reserved by the architecture spec for OS use. (Windows uses them for a "working set list index.") Therefore the physical page number field of the PTE can never grow beyond bit 51. 64 bits total - 12 low-order bits - 12 high-order bits = 40 bits of physical page number from the PTE, plus 12 bits of byte offset from the original virtual address, means we have an absolute maximum possible 52 bits of physical (RAM) address. Now of course current implementations are not supporting anything like this many bits, but it is not because the 12 most significant bits are reserved for special non-address-bit meanings; it is just that nobody thinks there is a need to provide for addressing more than 4.5x10 bytes of RAM (4.5 million gigabytes) in anything like the immediate future. Perhaps indeed someone will come up with a special meaning for bit 62 or bit 61 but I doubt seriously that we'll be pushing 52-bit physical addresses, let alone 60-bit physical addresses, by that time. Jeh (talk) 12:15, 18 June 2009 (UTC) (The preceding comment has been edited by the original author. New or changed text is in bold, removed text is in strikeout. See my next comment below, 22:49, 16 February 2014 (UTC), for more.) Jeh (talk) 22:52, 16 February 2014 (UTC)

I think the following sentence in the article is not explaining well why the physical address is limited to 52 bits: "Because the 12 least significant bits of the page table entry's 64 bits are either similar flags or are available for OS-specific data, a maximum of 52 bits are available to address 2 bytes, or 4 petabytes, of physical memory." The limitation is not because the 12 least significant bits are used for flags or OS-specific data, but because the 12 _most_ significant bits are either reserved or in case of bit 63 used for the NX flag. Seipher (talk) 20:47, 16 February 2014 (UTC)

It's actually both (12 high and 12 low), resulting in the PTE supplying only 40 bits of physical address and the original VA supplying 12 more. You're correct though that the graf as written is both misleading and incomplete. So is my comment above of 18 June 2009. I've fixed the above, and will fix the article unless you want to. Jeh (talk) 22:49, 16 February 2014 (UTC)

...and, the article is updated. Comments? Jeh (talk) 00:17, 17 February 2014 (UTC)

Looks correct to me. Thanks for the quick update. Seipher (talk) 01:45, 20 February 2014 (UTC)

The very reason why there are only 52 bits used for addressing in PAE mode is that the very first 8086 processor using segmentation to address physical memory, where segment register such as CS is 16bit but referring 20-bit long segments after shifting 4 bits to the left. Keeping this schema, if there were 32bit real mode, then 20 bits (used for referring segments) + 32 bits (base address) = 52 bits (for logical addresses). But this is not the truth, but just a guide to draw the reason why. In Intel64 and IA-32 Architectures Software Developer's Manual, it says M is an abbreviation for MAXPHYADDR, which is at most 52, where M is used in PDE, PTE and PPDE without further explanation. But I don't believe, for AMD64 architecture, that would be the extreme limit for the physical addressing. If further AMD64 processor gets rid of legacy mode completely, then there would potentially 63bits for addressing physical memory rather than 52bits, like it in Itanium architecture. That might be wrong, but just put a stop to end this topic. Janagewen (talk) 14:27, 20 October 2014 (UTC)

Sorry but that makes no sense. One, there is no segmentation in long mode. Two, the size of a logical address is not 52 bits; it is currently 48 but could be anything up to 64 bits. Three, there is no fixed relationship between size of logical and physical address, so your little calculus of 20+32=52 bits has nothing to do with physical address size. The 52 bit limit comes from: 12 bits come from the linear address (the offset in the page), and 40 bits from the PTE. The reason it is only 40 bits from the PTE is that the PTE is 64 bits wide and 24 of the bits are designated for other purposes; about half of them interpreted by the MMU and the others reserved for use by the OS. If for some reason we need larger physical addresses in the future a new "long mode PAE" could be defined with a different page table format. It would have nothing to do with getting rid of legacy mode. So, yes, you're wrong. And the topic was already quiescent as of eight months ago. Jeh (talk) 17:36, 20 October 2014 (UTC)

Yeah, that's a great explanation. Jeh, anyway, thank you for your reply. Janagewen (talk) 23:53, 20 October 2014 (UTC)

I thought it was sufficient when I gave it eight months ago (22:49 pm, 16 February 2014 (UTC)). Jeh (talk) 00:10, 21 October 2014 (UTC)

This topic was created by me, the very "done" or "archive" should I make or any wiki administrator rather than someone else. Janagewen (talk) 22:44, 22 October 2014 (UTC)

The section creator has no special rights of ownership, and it had been quiet for eight months. Had archiving been enabled previously it would have been archived months ago and the recent pointless addition would have been avoided. If you really care about the integrity of the material here you could improve it by applying the <s> strikeout </s> tag to your (well-intentioned but wrong) entry of 14:27, 20 October 2014 (UTC). After that, please stop contributing to this section and it will be archived automatically in 30 days. Jeh (talk) 01:41, 23 October 2014 (UTC)

It seems that me and my topic is a shit, but who are you on Misplaced Pages.org, Jeh? For your airy attitude towards everything that I post on wiki, I am tired of. I just wish this topic could be kept here for someone else who is intelligent enough to make an even proper answer to the ones who have the similar question too... Evaluate word phrase "human right", Jeh! Janagewen (talk) 03:09, 23 October 2014 (UTC)

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