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{{Short description|Electronic circuit formed on a small, flat piece of semiconductor material}}
{{Redirect|Silicon chip|the electronics magazine|Silicon Chip}} {{Redirect|Silicon chip|the electronics magazine|Silicon Chip}}
{{Redirect|Microchip||Microchip (disambiguation)}} {{Redirect|Microchip||Microchip (disambiguation)}}
{{Use dmy dates|date=May 2012}} {{Use dmy dates|date=October 2020}}


] integrated circuits. These ] have a transparent window that shows the ] inside. The window is used to erase the memory by exposing the chip to ].]] ] used to control ]s. The ]s are the dark circles surrounding the integrated circuit.]]
]
], down to the polysilicon (pink), wells (greyish), and substrate (green)]]


An '''integrated circuit''' ('''IC'''), also known as a '''microchip''' or simply '''chip''', is a small electronic device made up of multiple interconnected electronic components such as ]s, ]s, and ]s. These components are etched onto a small piece of ] material, usually ]. Integrated circuits are used in a wide range of electronic devices, including ]s, ]s, and ]s, to perform various functions such as processing and storing information. They have greatly impacted the field of electronics by enabling device miniaturization and enhanced functionality.
An '''integrated circuit''' or '''monolithic integrated circuit''' (also referred to as an '''IC''', a '''chip''', or a '''microchip''') is a set of ]s on one small flat piece (or "chip") of ] material that is normally ]. The integration of ] of tiny ]s into a small chip results in circuits that are orders of magnitude smaller, faster, and less expensive than those constructed of discrete ]s. The IC's ] capability, reliability, and building-block approach to ] has ensured the rapid adoption of standardized ICs in place of designs using discrete ]s. ICs are now used in virtually all electronic equipment and have revolutionized the world of ]. ]s, ]s, and other digital ]s are now inextricable parts of the structure of modern societies, made possible by the small size and low cost of ICs.


Integrated circuits are orders of magnitude smaller, faster, and less expensive than those constructed of discrete components, allowing a large ].
Integrated circuits were made practical by technological advancements in ] (MOS) ]. Since their origins in the 1960s, the size, speed, and capacity of chips have progressed enormously, driven by technical advances that fit more and more MOS transistors on chips of the same size – a modern chip may have many billions of MOS transistors in an area the size of a human fingernail. These advances, roughly following ], make computer chips of today possess millions of times the capacity and thousands of times the speed of the computer chips of the early 1970s.


The IC's ] capability, reliability, and building-block approach to ] have ensured the rapid adoption of standardized ICs in place of designs using discrete transistors. ICs are now used in virtually all electronic equipment and have revolutionized the world of ]. Computers, mobile phones, and other ]s are now essential parts of the structure of modern societies, made possible by the small size and low cost of ICs such as modern ]s and ]s.
ICs have two main advantages over ]s: cost and performance. Cost is low because the chips, with all their components, are printed as a unit by ] rather than being constructed one transistor at a time. Furthermore, packaged ICs use much less material than discrete circuits. Performance is high because the IC's components switch quickly and consume comparatively little power because of their small size and proximity. The main disadvantage of ICs is the high cost to ] them and ] the required ]s. This high initial cost means ICs are only practical when ] are anticipated.

] was made practical by technological advancements in ]. Since their origins in the 1960s, the size, speed, and capacity of chips have progressed enormously, driven by technical advances that fit more and more transistors on chips of the same size – a modern chip may have many billions of transistors in an area the size of a human fingernail. These advances, roughly following ], make the computer chips of today possess millions of times the capacity and thousands of times the speed of the computer chips of the early 1970s.

ICs have three main advantages over circuits constructed out of discrete components: size, cost and performance. The size and cost is low because the chips, with all their components, are printed as a unit by ] rather than being constructed one transistor at a time. Furthermore, packaged ICs use much less material than discrete circuits. Performance is high because the IC's components switch quickly and consume comparatively little power because of their small size and proximity. The main disadvantage of ICs is the high initial cost of designing them and the enormous capital cost of factory construction. This high initial cost means ICs are only commercially viable when ] are anticipated.


== Terminology == == Terminology ==
An ''integrated circuit'' is defined as:<ref>{{cite web |url=http://www.jedec.org/standards-documents/dictionary/terms/integrated-circuit-ic |title=Integrated circuit (IC) |publisher=]}}</ref> <blockquote>A circuit in which all or some of the circuit elements are inseparably associated and electrically interconnected so that it is considered to be indivisible for the purposes of construction and commerce.</blockquote> Circuits meeting this definition can be constructed using many different technologies, including ]s, ], or ]s. However, in general usage ''integrated circuit'' has come to refer to the single-piece circuit construction originally known as a ''monolithic integrated circuit''.<ref>{{cite web |title=The first monolithic integrated circuits |url=http://homepages.nildram.co.uk/~wylie/ICs/monolith.htm |quote=Nowadays when people say 'integrated circuit' they usually mean a monolithic IC, where the entire circuit is constructed in a single piece of silicon. |author=Andrew Wylie |year=2009 |accessdate=14 March 2011}}</ref><ref>{{cite book| last1 = Horowitz| first1 = Paul| authorlink1 = Paul Horowitz| last2 = Hill| first2 = Winfield| authorlink2 = Winfield Hill| title = The Art of Electronics| edition = 2nd| year = 1989| publisher = Cambridge University Press| isbn = 978-0-521-37095-0| page = | quote = Integrated circuits, which have largely replaced circuits constructed from discrete transistors, are themselves merely arrays of transistors and other components built from a single chip of semiconductor material.| url = https://archive.org/details/artofelectronics00horo/page/61}}</ref> An ''integrated circuit'' is defined as:<ref>{{cite web |url=http://www.jedec.org/standards-documents/dictionary/terms/integrated-circuit-ic |title=Integrated circuit (IC) |publisher=]}}</ref> <blockquote>A circuit in which all or some of the circuit elements are inseparably associated and electrically interconnected so that it is considered to be indivisible for the purposes of construction and commerce.</blockquote> In strict usage, ''integrated circuit'' refers to the single-piece circuit construction originally known as a ''monolithic integrated circuit'', which comprises a single piece of silicon.<ref>{{cite web |title=The first monolithic integrated circuits |url=http://homepages.nildram.co.uk/~wylie/ICs/monolith.htm |quote=Nowadays when people say 'integrated circuit' they usually mean a monolithic IC, where the entire circuit is constructed in a single piece of silicon. |author=Wylie, Andrew |year=2009 |access-date=14 March 2011 |archive-date=4 May 2018 |archive-url=https://web.archive.org/web/20180504074623/http://homepages.nildram.co.uk/~wylie/ICs/monolith.htm |url-status=dead }}</ref><ref>{{cite book| last1 = Horowitz| first1 = Paul| author-link1 = Paul Horowitz| last2 = Hill| first2 = Winfield| author-link2 = Winfield Hill| title = The Art of Electronics| edition = 2nd| year = 1989| publisher = Cambridge University Press| isbn = 978-0-521-37095-0| page = | quote = Integrated circuits, which have largely replaced circuits constructed from discrete transistors, are themselves merely arrays of transistors and other components built from a single chip of semiconductor material.| url = https://archive.org/details/artofelectronics00horo/page/61}}</ref> In general usage, circuits not meeting this strict definition are sometimes referred to as ICs, which are constructed using many different technologies, e.g. ], ], ], ]s, ], or ]s. The choice of terminology frequently appears in discussions related to whether ] is obsolete.]'s original integrated circuit; the world's first. Made from ] with gold-wire interconnects.]]


== History == == History ==
An early attempt at combining several components in one device (like modern ICs) was the ] vacuum tube first made in 1926.<ref name=mikeHarrison >Mike Harrison, ''Mike's Electric Stuff'' </ref><ref>{{cite web | url=https://collection.sciencemuseumgroup.org.uk/objects/co8722786/loewe-3nf-radio-valve-1926-1966-thermionic-valve | title=Loewe 3NF radio valve, 1926-1966 &#124; Science Museum Group Collection }}</ref> Unlike ICs, it was designed with the purpose of ], as in Germany, radio receivers had a tax that was levied depending on how many tube holders a radio receiver had. It allowed radio receivers to have a single tube holder. One million were manufactured, and were "a first step in integration of radioelectronic devices".<ref name=antonPankratov >Anton Pankratov </ref> The device contained an ], composed of three triodes, two capacitors and four resistors in a six-pin device.<ref name=cliveMaxfield >Clive Maxfield, EE Times </ref> Radios with the Loewe 3NF were less expensive than other radios,<ref>{{cite book | url=https://books.google.com/books?id=IAjtEeVtXqAC&dq=Loewe+3NF&pg=PA105 | title=The Race for Wireless: How Radio was Invented (Or Discovered?) | isbn=978-1-4634-3750-3 | last1=Malanowski | first1=Gregory | date=2011 | publisher=AuthorHouse }}</ref> showing one of the advantages of integration over using ], that would be seen decades later with ICs.<ref>{{cite book | url=https://books.google.com/books?id=UjJlDwAAQBAJ&dq=discrete+vs+integrated+circuit+cost&pg=SA1-PA6 | title=Principles of VLSI and CMOS Integrated Circuits | date=2016 | publisher=S. Chand | isbn=978-81-219-4000-9 }}</ref>
]'s original ] from 1958. This was the first integrated circuit, and was made from ].]]


Early concepts of an integrated circuit go back to 1949, when German engineer Werner Jacobi<ref name="computerhistory-ic">{{cite web|url=https://www.computerhistory.org/atchm/who-invented-the-ic/|title=Who Invented the IC? - @CHM Blog - Computer History Museum|website=www.computerhistory.org|date=20 August 2014}}</ref> (])<ref>{{cite web|url=http://integratedcircuithelp.com/invention.html |title=Integrated circuits help Invention |publisher=Integratedcircuithelp.com |date= |accessdate=2012-08-13}}</ref> filed a patent for an integrated-circuit-like semiconductor amplifying device<ref name="jacobi1949">{{patent|DE|833366|W. Jacobi/SIEMENS AG: "Halbleiterverstärker" priority filing on 14 April 1949, published on 15 May 1952.}}</ref> showing five ] on a common substrate in a 3-stage ] arrangement. Jacobi disclosed small and cheap ]s as typical industrial applications of his patent. An immediate commercial use of his patent has not been reported. Early concepts of an integrated circuit go back to 1949, when German engineer ]<ref name="computerhistory-ic">{{cite web|url=https://www.computerhistory.org/atchm/who-invented-the-ic/|title=Who Invented the IC? |department=@CHM Blog |publisher=Computer History Museum |date=20 August 2014}}</ref> (])<ref>{{cite web|url=http://integratedcircuithelp.com/invention.html |title=Integrated circuits help Invention |publisher=Integratedcircuithelp.com |access-date=2012-08-13}}</ref> filed a patent for an integrated-circuit-like semiconductor amplifying device<ref name="jacobi1949">{{cite patent|country=DE|number=833366||invent1=W. Jacobi|assignee=SIEMENS AG |title=Halbleiterverstärker" |fdate=14 April 1949 |pubdate=15 May 1952 |status=patent}}</ref> showing five ]s on a common substrate in a three-stage ] arrangement. Jacobi disclosed small and cheap ]s as typical industrial applications of his patent. An immediate commercial use of his patent has not been reported.


The idea of an integrated circuit was conceived by ] (1909–2002), a radar scientist working for the ] of the British ]. Dummer presented the idea to the public at the Symposium on Progress in Quality Electronic Components in ] on 7 May 1952.<ref> {{webarchive|url=https://web.archive.org/web/20130511181443/http://www.epn-online.com/page/22909/the-hapless-tale-of-geoffrey-dummer-this-is-the-sad-.html |date=11 May 2013 }}, (n.d.), (HTML), ''Electronic Product News'', accessed 8 July 2008.</ref> He gave many symposia publicly to propagate his ideas and unsuccessfully attempted to build such a circuit in 1956. Between 1953 and 1957, ] and Yasuro Tarui (]) proposed similar chip designs where several transistors could share a common active area, but there was no ] to separate them from each other.<ref name="computerhistory-ic"/> Another early proponent of the concept was ] (1909–2002), a radar scientist working for the ] of the British ]. Dummer presented the idea to the public at the Symposium on Progress in Quality Electronic Components in ], on 7 May 1952.<ref>{{cite web | title=The Hapless Tale of Geoffrey Dummer | website=epn-online.com | date=2005-10-01 | url=http://www.epn-online.com/page/22909/the-hapless-tale-of-geoffrey-dummer-this-is-the-sad-.html | archive-url=https://web.archive.org/web/20110726112126/http://www.epn-online.com/page/22909/the-hapless-tale-of-geoffrey-dummer-this-is-the-sad-.html | archive-date=2011-07-26 | url-status=dead }}</ref> He gave many symposia publicly to propagate his ideas and unsuccessfully attempted to build such a circuit in 1956. Between 1953 and 1957, ] and Yasuo Tarui (]) proposed similar chip designs where several transistors could share a common active area, but there was no ] to separate them from each other.<ref name="computerhistory-ic"/>


The monolithic integrated circuit chip was enabled by the inventions of the ] by ] and ] by ]. Hoerni's invention was built on Carl Frosch and Lincoln Derick's work on surface protection and passivation by silicon dioxide masking and predeposition,<ref>{{Cite patent|number=US2802760A|title=Oxidation of semiconductive surfaces for controlled diffusion|gdate=1957-08-13|invent1=Lincoln|invent2=Frosch|inventor1-first=Derick|inventor2-first=Carl J.|url=https://patents.google.com/patent/US2802760A}}</ref><ref>{{Cite journal |last1=Frosch |first1=C. J. |last2=Derick |first2=L |date=1957 |title=Surface Protection and Selective Masking during Diffusion in Silicon |url=https://iopscience.iop.org/article/10.1149/1.2428650 |journal=Journal of the Electrochemical Society |language=en |volume=104 |issue=9 |pages=547 |doi=10.1149/1.2428650}}</ref><ref name="Lojek120">{{cite book |last1=Lojek |first1=Bo |title=History of Semiconductor Engineering |date=2007 |publisher=] |isbn=9783540342588 |page=120}}</ref> as well as Fuller, Ditzenberger's and others work on the diffusion of impurities into silicon. <ref>{{Cite journal |last1=Fuller |first1=C. S. |last2=Ditzenberger |first2=J. A. |date=1953-07-01 |title=Diffusion of Lithium into Germanium and Silicon |url=https://link.aps.org/doi/10.1103/PhysRev.91.193 |journal=Physical Review |language=en |volume=91 |issue=1 |pages=193 |doi=10.1103/PhysRev.91.193 |bibcode=1953PhRv...91..193F |issn=0031-899X}}</ref><ref>{{Cite journal |last1=Fuller |first1=C. S. |last2=Struthers |first2=J. D. |last3=Ditzenberger |first3=J. A. |last4=Wolfstirn |first4=K. B. |date=1954-03-15 |title=Diffusivity and Solubility of Copper in Germanium |url=https://link.aps.org/doi/10.1103/PhysRev.93.1182 |journal=Physical Review |language=en |volume=93 |issue=6 |pages=1182–1189 |doi=10.1103/PhysRev.93.1182 |bibcode=1954PhRv...93.1182F |issn=0031-899X}}</ref><ref>{{Cite journal |last1=Fuller |first1=C. S. |last2=Ditzenberger |first2=J. A. |date=1956-05-01 |title=Diffusion of Donor and Acceptor Elements in Silicon |url=https://pubs.aip.org/jap/article/27/5/544/161241/Diffusion-of-Donor-and-Acceptor-Elements-in |journal=Journal of Applied Physics |language=en |volume=27 |issue=5 |pages=544–553 |doi=10.1063/1.1722419 |bibcode=1956JAP....27..544F |issn=0021-8979}}</ref><ref>{{Cite journal |last1=Fuller |first1=C. S. |last2=Whelan |first2=J. M. |date=1958-08-01 |title=Diffusion, solubility, and electrical behavior of copper in gallium arsenide |url=https://www.sciencedirect.com/science/article/abs/pii/002236975890091X |journal=Journal of Physics and Chemistry of Solids |volume=6 |issue=2 |pages=173–177 |doi=10.1016/0022-3697(58)90091-X |bibcode=1958JPCS....6..173F |issn=0022-3697}}</ref><ref>{{Cite journal |last1=Miller |first1=R. C. |last2=Savage |first2=A. |date=1956-12-01 |title=Diffusion of Aluminum in Single Crystal Silicon |url=https://pubs.aip.org/jap/article/27/12/1430/161591/Diffusion-of-Aluminum-in-Single-Crystal-Silicon |journal=Journal of Applied Physics |language=en |volume=27 |issue=12 |pages=1430–1432 |doi=10.1063/1.1722283 |bibcode=1956JAP....27.1430M |issn=0021-8979}}</ref>
The monolithic integrated circuit chip was enabled by the ] process, which electrically stabilized ] surfaces via ], making it possible to ] monolithic integrated circuit chips using silicon. The surface passivation process was developed by ] at ] in 1957. This was the basis for the ], developed by ] at ] in early 1959, which was critical to the invention of the monolithic integrated circuit chip.<ref>{{cite book |last1=Lojek |first1=Bo |title=History of Semiconductor Engineering |date=2007 |publisher=] |isbn=9783540342588 |pages=120 & 321–323}}</ref><ref name="Bassett46">{{cite book |last1=Bassett |first1=Ross Knox |title=To the Digital Age: Research Labs, Start-up Companies, and the Rise of MOS Technology |date=2007 |publisher=] |isbn=9780801886393 |page=46 |url=https://books.google.com/books?id=UUbB3d2UnaAC&pg=PA46}}</ref><ref name="Sah">{{cite journal |last=Sah |first=Chih-Tang |author-link=Chih-Tang Sah |title=Evolution of the MOS transistor-from conception to VLSI |journal=] |date=October 1988 |volume=76 |issue=10 |pages=1280–1326 (1290) |doi=10.1109/5.16328 |url=http://www.dejazzer.com/ece723/resources/Evolution_of_the_MOS_transistor.pdf |issn=0018-9219 |bibcode=1988IEEEP..76.1280S |quote=Those of us active in silicon material and device research during 1956{{ndash}}1960 considered this successful effort by the Bell Labs group led by Atalla to stabilize the silicon surface the most important and significant technology advance, which blazed the trail that led to silicon integrated circuit technology developments in the second phase and volume production in the third phase.}}</ref> A key concept behind the monolithic&nbsp;IC is the principle of ], which allows each transistor to operate independently despite being part of the same piece of silicon. Atalla's surface passivation process isolated individual ] and transistors,<ref name="Wolf">{{cite journal |last1=Wolf |first1=Stanley |title=A review of IC isolation technologies |journal=Solid State Technology |date=March 1992 |page=63 |url=http://go.galegroup.com/ps/anonymous?id=GALE%7CA12308297}}</ref> which was extended to independent transistors on a single piece of silicon by ] at ] in 1959,<ref>Kurt Lehovec's patent on the isolation p–n&nbsp;junction: {{US patent|3029366}} granted on 10 April 1962, filed 22 April 1959. Robert Noyce acknowledges Lehovec in his article – "Microelectronics", '']'', September 1977, Volume 23, Number 3, pp. 63–69.</ref> and then independently by ] at Fairchild later the same year.<ref name=r6>{{cite web|url=http://www.ieeeghn.org/index.php/Oral-History:Robert_N._Noyce |title=Interview with Robert Noyce, 1975–1976 |publisher=IEEE |accessdate=2012-04-22 |archiveurl=https://www.webcitation.org/6AmdIVB3w?url=http://www.ieeeghn.org/index.php/Oral-History%3ARobert_N._Noyce |archivedate=2012-09-19 |url-status=dead |df= }}</ref><ref>{{cite book |last=Brock |first=D. |last2=Lécuyer |first2=C. |title = Makers of the Microchip: A Documentary History of Fairchild Semiconductor |url = https://books.google.com/books?id=LaZpUpkG70QC |editor = Lécuyer, C. |publisher = MIT Press |year = 2010 |isbn = 9780262014243 |ref = CITEREFBrock2010 |page = 158}}</ref>


=== First integrated circuits === === The first integrated circuits ===
{{Main|Invention of the integrated circuit}} {{Main|Invention of the integrated circuit}}
{{See also|Planar process|p–n junction isolation|Surface passivation}} {{See also|Planar process|p–n junction isolation|Surface passivation}}
] invented the first monolithic IC chip in 1959. It was made from ], and was ] using ]'s ] and ]'s ] process.]] ] invented the first monolithic integrated circuit in 1959. The chip was made from ].]]


A precursor idea to the IC was to create small ceramic substrates (so-called ''micromodules''),<ref name=micromodules/> each containing a single miniaturized component. Components could then be integrated and wired into a bidimensional or tridimensional compact grid. This idea, which seemed very promising in 1957, was proposed to the US Army by ]{{citation needed|date=September 2019}} and led to the short-lived Micromodule Program (similar to 1951's Project Tinkertoy).<ref name= micromodules >{{Cite web|url=http://www.eetimes.com/special/special_issues/millennium/milestones/kilby.html|title=Micromodules: the ultimate package|last=Rostky|first=George|date=|website=EE Times|archive-url=https://web.archive.org/web/20100107111717/http://www.eetimes.com/special/special_issues/millennium/milestones/kilby.html|archive-date=2010-01-07|url-status= |access-date=2018-04-23}}</ref><ref>{{Cite web|url=http://www.chipsetc.com/the-rca-micromodule.html|title=The RCA Micromodule|website=Vintage Computer Chip Collectibles, Memorabilia & Jewelry|access-date=2018-04-23}}</ref><ref>{{Cite book|url=https://books.google.com/?id=tdCjBQAAQBAJ&lpg=PA394&dq=circuity%20micromodular%20construction&pg=PA392#v=onepage&q=micromodule&f=false|title=American Microelectronics Data Annual 1964–65|last=Dummer|first=G.W.A.|last2=Robertson|first2=J. Mackenzie|date=2014-05-16|publisher=Elsevier|isbn=978-1-4831-8549-1|location=|pages=392–397, 405–406}}</ref> However, as the project was gaining momentum, Kilby came up with a new, revolutionary design: the&nbsp;IC. A precursor idea to the IC was to create small ceramic substrates (so-called ''micromodules''),<ref name=micromodules/> each containing a single miniaturized component. Components could then be integrated and wired into a bidimensional or tridimensional compact grid. This idea, which seemed very promising in 1957, was proposed to the US Army by ]<ref name="micromodules" /> and led to the short-lived Micromodule Program (similar to 1951's Project Tinkertoy).<ref name= micromodules >{{Cite web|url=http://www.eetimes.com/special/special_issues/millennium/milestones/kilby.html|title=Micromodules: the ultimate package|last=Rostky|first=George|website=EE Times|archive-url=https://web.archive.org/web/20100107111717/http://www.eetimes.com/special/special_issues/millennium/milestones/kilby.html|archive-date=2010-01-07|access-date=2018-04-23}}</ref><ref>{{Cite web|url=http://www.chipsetc.com/the-rca-micromodule.html|title=The RCA Micromodule|website=Vintage Computer Chip Collectibles, Memorabilia & Jewelry|access-date=2018-04-23}}</ref><ref>{{Cite book|url=https://books.google.com/books?id=tdCjBQAAQBAJ&q=micromodule&pg=PA392|title=American Microelectronics Data Annual 1964–65|last1=Dummer|first1=G.W.A.|last2=Robertson|first2=J. Mackenzie|date=2014-05-16|publisher=Elsevier|isbn=978-1-4831-8549-1|pages=392–397, 405–406}}</ref> However, as the project was gaining momentum, Kilby came up with a new, revolutionary design: the&nbsp;IC.


Newly employed by ], Kilby recorded his initial ideas concerning the integrated circuit in July 1958, successfully demonstrating the first working example of an integrated circuit on 12 September 1958.<ref name="TIJackBuilt">, (c. 2008), (HTML), Texas Instruments, Retrieved 29 May 2008.</ref> In his patent application of 6 February 1959,<ref>Jack S. Kilby, Miniaturized Electronic Circuits, United States Patent Office, US Patent 3,138,743, filed 6 February 1959, issued 23 June 1964.</ref> Kilby described his new device as "a body of semiconductor material … wherein all the components of the electronic circuit are completely integrated."<ref>{{cite book| last = Winston| first = Brian| title = Media Technology and Society: A History: From the Telegraph to the Internet| url = https://books.google.com/?id=gfeCXlElJTwC&pg=PA221| year = 1998| publisher = Routledge| isbn = 978-0-415-14230-4| page = 221 }}</ref> The first customer for the new invention was the ].<ref>{{cite web|url=http://www.ti.com/corp/docs/company/history/timeline/defense/1960/docs/61-first_ic.htm |title=Texas Instruments – 1961 First IC-based computer |publisher=Ti.com |date= |accessdate=2012-08-13}}</ref> Kilby won the 2000 ] in physics for his part in the invention of the integrated circuit.<ref>Nobel Web AB, (10 October 2000),, Retrieved 29 May 2008</ref> However, Kilby's invention was a ] (hybrid IC), rather than a monolithic integrated circuit (monolithic IC) chip.<ref name="Saxena140">{{cite book |last1=Saxena |first1=Arjun N. |title=Invention of Integrated Circuits: Untold Important Facts |date=2009 |publisher=] |isbn=9789812814456 |page=140 |url=https://books.google.com/books?id=-3lpDQAAQBAJ&pg=PA140}}</ref> Kilby's IC had external wire connections, which made it difficult to mass-produce.<ref name="nasa">{{cite web |title=Integrated circuits |url=https://www.hq.nasa.gov/alsj/ic-pg3.html |website=] |accessdate=13 August 2019}}</ref> Newly employed by ], Kilby recorded his initial ideas concerning the integrated circuit in July 1958, successfully demonstrating the first working example of an integrated circuit on 12 September 1958.<ref name="TIJackBuilt">{{cite web | title=The Chip That Jack Built Changed the World | website=ti.com | date=1997-09-09 | url=http://www.ti.com/corp/docs/kilbyctr/jackbuilt.shtml | archive-url=https://web.archive.org/web/20000418135808/http://www.ti.com/corp/docs/kilbyctr/jackbuilt.shtml | archive-date=2000-04-18 | url-status=unfit}}</ref> In his patent application of 6 February 1959,<ref>{{cite patent |inventor-last=Kilby |inventor-first=Jack S. |title=Miniaturized Electronic Circuits |country=US |status=Patent|number=3138743 |fdate=6 February 1959 |pubdate=23 June 1964}}</ref> Kilby described his new device as "a body of semiconductor material … wherein all the components of the electronic circuit are completely integrated".<ref>{{cite book| last = Winston| first = Brian| title = Media Technology and Society: A History: From the Telegraph to the Internet| url = https://books.google.com/books?id=gfeCXlElJTwC&pg=PA221| year = 1998| publisher = Routledge| isbn = 978-0-415-14230-4| page = 221 }}</ref> The first customer for the new invention was the ].<ref>{{cite web|url=http://www.ti.com/corp/docs/company/history/timeline/defense/1960/docs/61-first_ic.htm |title=Texas Instruments – 1961 First IC-based computer |publisher=Ti.com |access-date=2012-08-13}}</ref> Kilby won the 2000 ] in physics for his part in the invention of the integrated circuit.<ref>{{cite web | title=The Nobel Prize in Physics 2000 | website=NobelPrize.org | date=2000-10-10 | url=https://www.nobelprize.org/prizes/physics/2000/press-release/}}</ref>


Half a year after Kilby, ] at ] invented the first true monolithic IC chip.<ref name="computerhistory1959">{{cite web |title=1959: Practical Monolithic Integrated Circuit Concept Patented |url=https://www.computerhistory.org/siliconengine/practical-monolithic-integrated-circuit-concept-patented/ |website=] |accessdate=13 August 2019}}</ref><ref name="nasa"/> It was a new variety of integrated circuit, more practical than Kilby's implementation. Noyce's design was made of ], whereas Kilby's chip was made of ]. Noyce's monolithic IC put all components on a chip of silicon and connected them with copper lines.<ref name="nasa"/> Noyce's monolithic IC was ] using the ], developed in early 1959 by his colleague ]. In turn, Hoerni's planar process was based on Mohamed Atalla's ] process.<ref name="Lojek120">{{cite book |last1=Lojek |first1=Bo |title=History of Semiconductor Engineering |date=2007 |publisher=] |isbn=9783540342588 |page=120}}</ref><ref>{{cite book |last1=Bassett |first1=Ross Knox |title=To the Digital Age: Research Labs, Start-up Companies, and the Rise of MOS Technology |date=2007 |publisher=Johns Hopkins University Press |isbn=9780801886393 |page=46 |url=https://books.google.com/books?id=UUbB3d2UnaAC&pg=PA46}}</ref><ref>{{cite book |last1=Huff |first1=Howard R. |last2=Tsuya |first2=H. |last3=Gösele |first3=U. |title=Silicon Materials Science and Technology: Proceedings of the Eighth International Symposium on Silicon Materials Science and Technology |date=1998 |publisher=] |pages=181–182 |url=https://books.google.com/books?id=SnQfAQAAIAAJ&pg=PA181}}</ref> Modern IC chips are based on Noyce's monolithic IC,<ref name="computerhistory1959"/><ref name="nasa"/> rather than Kilby's hybrid IC.<ref name="Saxena140"/> However, Kilby's invention was not a true monolithic integrated circuit chip since it had external gold-wire connections, which would have made it difficult to mass-produce.<ref name="nasa">{{cite web |title=Integrated circuits |url=https://www.hq.nasa.gov/alsj/ic-pg3.html |website=] |access-date=13 August 2019}}</ref> Half a year after Kilby, ] at ] invented the first true monolithic IC chip.<ref name="computerhistory1959">{{cite web |title=1959: Practical Monolithic Integrated Circuit Concept Patented |url=https://www.computerhistory.org/siliconengine/practical-monolithic-integrated-circuit-concept-patented/ |website=] |access-date=13 August 2019}}</ref><ref name="nasa"/> More practical than Kilby's implementation, Noyce's chip was made of ], whereas Kilby's was made of ], and Noyce's was fabricated using the ], developed in early 1959 by his colleague ] and included the critical on-chip aluminum interconnecting lines. Modern IC chips are based on Noyce's monolithic IC,<ref name="computerhistory1959"/><ref name="nasa"/> rather than Kilby's.

NASA's Apollo Program was the largest single consumer of integrated circuits between 1961 and 1965.<ref name="eldon">{{cite book | last=Hall | first=Eldon C. | title=Journey to the Moon: The History of the Apollo Guidance Computer | publisher=American Institute of Aeronautics and Astronautics | series=Library of Flight | year=1996 | isbn=978-1-56347-185-8 | url=https://books.google.com/books?id=G8Dml1x55r0C | access-date=2023-10-05 | pages=18–19}}</ref>

=== ] integrated circuits ===
{{Main|Transistor–transistor logic}}

] (TTL) was developed by ] in the early 1960s at ] TTL became the dominant integrated circuit technology during the 1970s to early 1980s.<ref>{{cite web |title=Computer Pioneers – James L. Buie |url=https://history.computer.org/pioneers/buie.html |website=] |access-date=25 May 2020}}</ref>], an Israeli electrical engineer who developed the ] in 1969-1971]]

Dozens of TTL integrated circuits were a standard method of construction for the ] of ]s and ]s. ]s such as ] mainframes, ] minicomputers and the desktop ] were built from ] integrated circuits,<ref name="tmx_shirriff" /> either TTL or the even faster ] (ECL).


=== MOS integrated circuits === === MOS integrated circuits ===
{{See|MOS integrated circuit}} {{Further|MOSFET applications#MOS integrated circuit}}
{{See also|List of semiconductor scale examples|Mixed-signal integrated circuit|Moore's law|Three-dimensional integrated circuit|Transistor count|Very Large Scale Integration}} {{See also|List of semiconductor scale examples|Mixed-signal integrated circuit|Moore's law|Three-dimensional integrated circuit|Transistor count|Very Large Scale Integration}}
]'s ] ] process (1957) was the basis for the monolithic IC chip. He later proposed the ] chip (1960).]]


Nearly all modern IC chips are ] (MOS) integrated circuits, built from ]s (metal–oxide–silicon field-effect transistors).<ref name="Kuo">{{cite journal |last1=Kuo |first1=Yue |title=Thin Film Transistor Technology—Past, Present, and Future |journal=The Electrochemical Society Interface |date=1 January 2013 |volume=22 |issue=1 |pages=55–61 |doi=10.1149/2.F06131if |url=https://www.electrochem.org/dl/interface/spr/spr13/spr13_p055_061.pdf |issn=1064-8208}}</ref> The MOSFET (also known as the MOS transistor), which was invented by ] and ] at Bell Labs in 1959,<ref>{{cite web |title=1960: Metal Oxide Semiconductor (MOS) Transistor Demonstrated |url=https://www.computerhistory.org/siliconengine/metal-oxide-semiconductor-mos-transistor-demonstrated/ |website=]}}</ref> made it possible to build ].<ref name="computerhistory-transistor">{{cite web |title=Who Invented the Transistor? |url=https://www.computerhistory.org/atchm/who-invented-the-transistor/ |website=] |date=4 December 2013 |accessdate=20 July 2019}}</ref> Atalla first proposed the concept of the ] (MOS IC) chip in 1960, noting that the MOSFET's ease of ] made it useful for integrated circuits.<ref name="Moskowitz">{{cite book |last1=Moskowitz |first1=Sanford L. |title=Advanced Materials Innovation: Managing Global Technology in the 21st century |date=2016 |publisher=] |isbn=9780470508923 |pages=165–167 |url=https://books.google.com/books?id=2STRDAAAQBAJ&pg=PA165}}</ref> In contrast to ] which required a number of steps for the ] of transistors on a chip, MOSFETs required no such steps but could be easily isolated from each other.<ref name="Bassett53">{{cite book |last1=Bassett |first1=Ross Knox |title=To the Digital Age: Research Labs, Start-up Companies, and the Rise of MOS Technology |date=2002 |publisher=] |isbn=978-0-8018-6809-2 |pages=53–4 |url=https://books.google.com/books?id=Qge1DUt7qDUC&pg=PA53}}</ref> Its advantage for integrated circuits was re-iterated by Dawon Kahng in 1961.<ref name="Bassett22">{{cite book |last1=Bassett |first1=Ross Knox |title=To the Digital Age: Research Labs, Start-up Companies, and the Rise of MOS Technology |date=2007 |publisher=] |isbn=9780801886393 |pages=22–25 |url=https://books.google.com/books?id=UUbB3d2UnaAC&pg=PA22}}</ref> The ] includes the first integrated circuit by Kilby in 1958,<ref>{{cite web |url=http://www.ieeeghn.org/index.php/Milestones:First_Semiconductor_Integrated_Circuit_%28IC%29,_1958 |title=Milestones:First Semiconductor Integrated Circuit (IC), 1958 |work=IEEE Global History Network |publisher=IEEE |accessdate=3 August 2011}}</ref> Hoerni's planar process and Noyce's planar IC in 1959, and the MOSFET by Atalla and Kahng in 1959.<ref></ref> Nearly all modern IC chips are ] (MOS) integrated circuits, built from ]s (metal–oxide–silicon field-effect transistors).<ref name="Kuo">{{cite journal |last1=Kuo |first1=Yue |title=Thin Film Transistor Technology—Past, Present, and Future |journal=The Electrochemical Society Interface |date=1 January 2013 |volume=22 |issue=1 |pages=55–61 |doi=10.1149/2.F06131if |bibcode=2013ECSIn..22a..55K |url=https://www.electrochem.org/dl/interface/spr/spr13/spr13_p055_061.pdf }}</ref> The MOSFET invented at Bell Labs between 1955 and 1960,<ref>{{Cite patent|number=US2802760A|title=Oxidation of semiconductive surfaces for controlled diffusion|gdate=1957-08-13|invent1=Lincoln|invent2=Frosch|inventor1-first=Derick|inventor2-first=Carl J.|url=https://patents.google.com/patent/US2802760A}}</ref><ref name=":0">{{Cite journal |last1=Huff |first1=Howard |last2=Riordan |first2=Michael |date=2007-09-01 |title=Frosch and Derick: Fifty Years Later (Foreword) |url=https://iopscience.iop.org/article/10.1149/2.F02073IF |journal=The Electrochemical Society Interface |volume=16 |issue=3 |pages=29 |doi=10.1149/2.F02073IF |issn=1064-8208}}</ref><ref>{{Cite journal |last1=Frosch |first1=C. J. |last2=Derick |first2=L |date=1957 |title=Surface Protection and Selective Masking during Diffusion in Silicon |url=https://iopscience.iop.org/article/10.1149/1.2428650 |journal=Journal of the Electrochemical Society |language=en |volume=104 |issue=9 |pages=547 |doi=10.1149/1.2428650}}</ref><ref>{{Cite journal |last=KAHNG |first=D. |date=1961 |title=Silicon-Silicon Dioxide Surface Device |url=https://doi.org/10.1142/9789814503464_0076 |journal=Technical Memorandum of Bell Laboratories|pages=583–596 |doi=10.1142/9789814503464_0076 |isbn=978-981-02-0209-5 }}</ref><ref>{{Cite book |last=Lojek |first=Bo |title=History of Semiconductor Engineering |date=2007 |publisher=Springer-Verlag Berlin Heidelberg |isbn=978-3-540-34258-8 |location=Berlin, Heidelberg |page=321}}</ref><ref>{{Cite journal |last1=Ligenza |first1=J.R. |last2=Spitzer |first2=W.G. |date=1960 |title=The mechanisms for silicon oxidation in steam and oxygen |url=https://linkinghub.elsevier.com/retrieve/pii/0022369760902195 |journal=Journal of Physics and Chemistry of Solids |language=en |volume=14 |pages=131–136 |doi=10.1016/0022-3697(60)90219-5|bibcode=1960JPCS...14..131L }}</ref><ref name="Lojek1202">{{cite book |last1=Lojek |first1=Bo |title=History of Semiconductor Engineering |date=2007 |publisher=] |isbn=9783540342588 |page=120}}</ref> made it possible to build ].<ref name="computerhistory-transistor">{{cite web |title=Who Invented the Transistor? |author=Laws, David |url=https://www.computerhistory.org/atchm/who-invented-the-transistor/ |website=] |date=4 December 2013 }}</ref> In contrast to ]s which required a number of steps for the ] of transistors on a chip, MOSFETs required no such steps but could be easily isolated from each other.<ref name="Bassett53">{{cite book |last1=Bassett |first1=Ross Knox |title=To the Digital Age: Research Labs, Start-up Companies, and the Rise of MOS Technology |date=2002 |publisher=] |isbn=978-0-8018-6809-2 |pages=53–4 |url=https://books.google.com/books?id=Qge1DUt7qDUC&pg=PA53}}</ref> Its advantage for integrated circuits was pointed out by Dawon Kahng in 1961.<ref name="Bassett22">{{cite book |last1=Bassett |first1=Ross Knox |title=To the Digital Age: Research Labs, Start-up Companies, and the Rise of MOS Technology |date=2007 |publisher=] |isbn=9780801886393 |pages=22–25 |url=https://books.google.com/books?id=UUbB3d2UnaAC&pg=PA22}}</ref> The ] includes the first integrated circuit by Kilby in 1958,<ref>{{cite web |url=http://www.ieeeghn.org/index.php/Milestones:First_Semiconductor_Integrated_Circuit_%28IC%29,_1958 |title=Milestones:First Semiconductor Integrated Circuit (IC), 1958 |work=IEEE Global History Network |publisher=IEEE |access-date=3 August 2011}}</ref> Hoerni's planar process and Noyce's planar IC in 1959.<ref>{{Cite web|url=https://ethw.org/Milestones:List_of_IEEE_Milestones|title=Milestones:List of IEEE Milestones – Engineering and Technology History Wiki|website=ethw.org|date=9 December 2020 }}</ref>

The earliest experimental MOS IC to be fabricated was a 16-transistor chip built by Fred Heiman and Steven Hofstein at ] in 1962.<ref name="computerhistory-digital">{{cite web |title=Tortoise of Transistors Wins the Race – CHM Revolution |url=https://www.computerhistory.org/revolution/digital-logic/12/279 |website=] |access-date=22 July 2019}}</ref> ] later introduced the first commercial MOS integrated circuit in 1964,<ref name="computerhistory1964">{{cite web|url=http://www.computerhistory.org/semiconductor/timeline/1964-Commecial.html|title=1964 – First Commercial MOS IC Introduced|website=]}}</ref> a 120-transistor ] developed by Robert Norman.<ref name="computerhistory-digital"/> By 1964, MOS chips had reached higher ] and lower manufacturing costs than ] chips. MOS chips further increased in complexity at a rate predicted by ], leading to ] (LSI) with hundreds of ]s on a single MOS chip by the late 1960s.<ref name="ieee">{{cite journal |last1=Shirriff |first1=Ken |title=The Surprising Story of the First Microprocessors |journal=] |volume=53 |issue=9 |pages=48–54 |date=30 August 2016 |publisher=] |url=https://spectrum.ieee.org/the-surprising-story-of-the-first-microprocessors|doi=10.1109/MSPEC.2016.7551353 |s2cid=32003640 }}</ref>


{{anchor|The self-aligned gate}}
The earliest experimental MOS IC to be fabricated was a 16-transistor chip built by Fred Heiman and Steven Hofstein at ] in 1962.<ref name="computerhistory-digital">{{cite web |title=Tortoise of Transistors Wins the Race - CHM Revolution |url=https://www.computerhistory.org/revolution/digital-logic/12/279 |website=] |accessdate=22 July 2019}}</ref> ] later introduced the first commercial MOS integrated circuit in 1964,<ref>{{cite web|url=http://www.computerhistory.org/semiconductor/timeline/1964-Commecial.html|title=1964 – First Commercial MOS IC Introduced|website=]}}</ref> a 120-transistor ] developed by Robert Norman.<ref name="computerhistory-digital"/> By 1964, MOS chips had reached higher ] and lower manufacturing costs than ] chips. MOS chips further increased in complexity at a rate predicted by ], leading to ] (LSI) with hundreds of ] on a single MOS chip by the late 1960s.<ref name="ieee">{{cite journal |last1=Shirriff |first1=Ken |title=The Surprising Story of the First Microprocessors |journal=] |date=30 August 2016 |publisher=] |url=https://spectrum.ieee.org/tech-history/silicon-revolution/the-surprising-story-of-the-first-microprocessors |accessdate=13 October 2019}}</ref>
Following the development of the ] (silicon-gate) MOSFET by Robert Kerwin, ] and John Sarace at Bell Labs in 1967,<ref>{{cite web |title=1968: Silicon Gate Technology Developed for ICs |url=https://www.computerhistory.org/siliconengine/silicon-gate-technology-developed-for-ics/ |website=] |access-date=22 July 2019}}</ref> the first ] MOS IC technology with ]s, the basis of all modern ] integrated circuits, was developed at Fairchild Semiconductor by ] in 1968.<ref>{{cite web |title=1968: Silicon Gate Technology Developed for ICs |url=https://www.computerhistory.org/siliconengine/silicon-gate-technology-developed-for-ics/ |website=The Silicon Engine |publisher=] |access-date=13 October 2019}}</ref> The application of MOS LSI chips to ] was the basis for the first ]s, as engineers began recognizing that a complete ] could be contained on a single MOS LSI chip. This led to the inventions of the microprocessor and the ] by the early 1970s.<ref name="ieee"/> During the early 1970s, MOS integrated circuit technology enabled the ] (VLSI) of more than 10,000 transistors on a single chip.<ref>{{cite journal |last1=Hittinger |first1=William C. |title=Metal–Oxide–Semiconductor Technology |journal=Scientific American |date=1973 |volume=229 |issue=2 |pages=48–59 |jstor=24923169 |doi=10.1038/scientificamerican0873-48 |bibcode=1973SciAm.229b..48H }}</ref>


At first, MOS-based computers only made sense when high density was required, such as ] and ]s. Computers built entirely from TTL, such as the 1970 ], were much faster and more powerful than single-chip MOS microprocessors such as the 1972 ] until the early 1980s.<ref name="tmx_shirriff">{{cite web | title=The Texas Instruments TMX 1795: the (almost) first, forgotten microprocessor | website=Ken Shirriff's blog | date=1970-10-25 | url=https://www.righto.com/2015/05/the-texas-instruments-tmx-1795-first.html }}</ref>
Following the development of the ] (silicon-gate) MOSFET by Robert Kerwin, Donald Klein and John Sarace at Bell Labs in 1967,<ref>{{cite web |title=1968: Silicon Gate Technology Developed for ICs |url=https://www.computerhistory.org/siliconengine/silicon-gate-technology-developed-for-ics/ |website=] |accessdate=22 July 2019}}</ref> the first ] MOS IC technology with ]s, the basis of all modern ] integrated circuits, was developed at Fairchild Semiconductor by ] in 1968.<ref>{{cite web |title=1968: Silicon Gate Technology Developed for ICs |url=https://www.computerhistory.org/siliconengine/silicon-gate-technology-developed-for-ics/ |website=The Silicon Engine |publisher=] |accessdate=13 October 2019}}</ref> The application of MOS LSI chips to ] was the basis for the first ], as engineers began recognizing that a complete ] could be contained on a single MOS LSI chip. This led to the inventions of the microprocessor and the ] by the early 1970s.<ref name="ieee"/> During the early 1970s, MOS integrated circuit technology enabled the ] (VLSI) of more than 10,000 transistors on a single chip.<ref>{{cite journal |last1=Hittinger |first1=William C. |title=Metal–Oxide–Semiconductor Technology |journal=Scientific American |date=1973 |volume=229 |issue=2 |pages=48–59 |issn=0036-8733|jstor=24923169 |doi=10.1038/scientificamerican0873-48 |bibcode=1973SciAm.229b..48H }}</ref>


Advances in IC technology, primarily ] and larger chips, have allowed ] of ]s in an integrated circuit to double every two years, a trend known as Moore's law. Moore originally stated it would double every year, but he went on to change the claim to every two years in 1975.<ref>{{Cite web|url=https://www.cnet.com/news/moores-law-to-roll-on-for-another-decade/|title=Moore's Law to roll on for another decade|last=Kanellos|first=Michael|website=CNET|access-date=2019-08-01}}</ref> This increased capacity has been used to decrease cost and increase functionality. In general, as the feature size shrinks, almost every aspect of an IC's operation improves. The cost per transistor and the ] per transistor goes down, while the ] and ] go up, through the relationships defined by ] (]).<ref>{{cite news |author=Davari, Bijan, Robert H. Dennard, and Ghavam G. Shahidi |title=CMOS scaling for high performance and low power-the next ten years |journal=Proceedings of the IEEE |volume=83 |issue=4 |year=1995 |pages=595–606 |url=http://www.cisl.columbia.edu/courses/spring-2002/ee6930/papers/high_perform_scaling.pdf}}</ref> Because speed, capacity, and power consumption gains are apparent to the end user, there is fierce competition among the manufacturers to use finer geometries. Over the years, transistor sizes have decreased from 10s of ] in the early 1970s to 10 ] in 2017 <ref>{{Cite web|url=https://news.samsung.com/global/qualcomm-and-samsung-collaborate-on-10nm-process-technology-for-the-latest-snapdragon-835-mobile-processor|title=Qualcomm and Samsung Collaborate on 10nm Process Technology for the Latest Snapdragon 835 Mobile Processor|website=news.samsung.com|access-date=2017-02-11}}</ref> with a corresponding million-fold increase in transistors per unit area. As of 2016, typical chip areas range from a few square ] to around 600&nbsp;mm<sup>2</sup>, with up to 25 million ]s per mm<sup>2</sup>.<ref name=Pascal>{{cite web |url=https://devblogs.nvidia.com/parallelforall/inside-pascal/ |title=Inside Pascal: NVIDIA's Newest Computing Platform|date=2016-04-05}}. 15,300,000,000 transistors in 610 mm<sup>2</sup>.</ref> Advances in IC technology, primarily ] and larger chips, have allowed ] of ]s in an integrated circuit to double every two years, a trend known as Moore's law. Moore originally stated it would double every year, but he went on to change the claim to every two years in 1975.<ref>{{Cite web|url=https://www.cnet.com/news/moores-law-to-roll-on-for-another-decade/|title=Moore's Law to roll on for another decade|last=Kanellos|first=Michael|website=CNET|date=February 11, 2003}}</ref> This increased capacity has been used to decrease cost and increase functionality. In general, as the feature size shrinks, almost every aspect of an IC's operation improves. The cost per transistor and the ] per transistor goes down, while the ] and ] go up, through the relationships defined by ] (]).<ref>{{cite news |author=Davari, Bijan, Robert H. Dennard, and Ghavam G. Shahidi |title=CMOS scaling for high performance and low power-the next ten years |journal=Proceedings of the IEEE |volume=83 |issue=4 |year=1995 |pages=595–606 |url=http://www.cisl.columbia.edu/courses/spring-2002/ee6930/papers/high_perform_scaling.pdf}}</ref> Because speed, capacity, and power consumption gains are apparent to the end user, there is fierce competition among the manufacturers to use finer geometries. Over the years, transistor sizes have decreased from tens of ]s in the early 1970s to 10 ]s in 2017<ref>{{Cite web|url=https://news.samsung.com/global/qualcomm-and-samsung-collaborate-on-10nm-process-technology-for-the-latest-snapdragon-835-mobile-processor|title=Qualcomm and Samsung Collaborate on 10nm Process Technology for the Latest Snapdragon 835 Mobile Processor|website=news.samsung.com|access-date=2017-02-11}}</ref> with a corresponding million-fold increase in transistors per unit area. As of 2016, typical chip areas range from a few square ]s to around 600&nbsp;mm<sup>2</sup>, with up to 25 million ]s per mm<sup>2</sup>.<ref name=Pascal>{{cite web |url=https://devblogs.nvidia.com/parallelforall/inside-pascal/ |title=Inside Pascal: NVIDIA's Newest Computing Platform|date=2016-04-05}}. 15,300,000,000 transistors in 610 mm<sup>2</sup>.</ref>


The expected shrinking of feature sizes and the needed progress in related areas was forecast for many years by the ] (ITRS). The final ITRS was issued in 2016, and it is being replaced by the ].<ref>{{cite web |title=International Roadmap for Devices and Systems |publisher=IEEE |year=2016 |url=http://rebootingcomputing.ieee.org/images/files/pdf/rc_irds.pdf}}</ref> The expected shrinking of feature sizes and the needed progress in related areas was forecast for many years by the ] (ITRS). The final ITRS was issued in 2016, and it is being replaced by the ].<ref>{{cite web |title=International Roadmap for Devices and Systems |publisher=IEEE |year=2016 |url=https://rebootingcomputing.ieee.org/images/files/pdf/rc_irds.pdf}}</ref>


Initially, ICs were strictly electronic devices. The success of ICs has led to the integration of other technologies, in an attempt to obtain the same advantages of small size and low cost. These technologies include mechanical devices, optics, and sensors. Initially, ICs were strictly electronic devices. The success of ICs has led to the integration of other technologies, in an attempt to obtain the same advantages of small size and low cost. These technologies include mechanical devices, optics, and sensors.
* ]s, and the closely related ]s, are chips that are sensitive to light. They have largely replaced ] in scientific, medical, and consumer applications. Billions of these devices are now produced each year for applications such as cellphones, tablets, and digital cameras. This sub-field of ICs won the Nobel Prize in 2009.<ref name= CcdNobel >{{citation | title = The Nobel Prize in Physics 2009 | url = http://nobelprize.org/nobel_prizes/physics/laureates/2009/index.html | publisher = Nobel Foundation | date = 2009-10-06 | accessdate = 2009-10-06}}.</ref> * ]s, and the closely related ]s, are chips that are sensitive to ]. They have largely replaced ] in scientific, medical, and consumer applications. Billions of these devices are now produced each year for applications such as cellphones, tablets, and digital cameras. This sub-field of ICs won the Nobel Prize in 2009.<ref name= CcdNobel >{{citation | title = The Nobel Prize in Physics 2009 | url = http://nobelprize.org/nobel_prizes/physics/laureates/2009/index.html | publisher = Nobel Foundation | date = 2009-10-06 | access-date = 2009-10-06}}.</ref>
* Very small mechanical devices driven by electricity can be integrated onto chips, a technology known as ]. These devices were developed in the late 1980s<ref>{{cite conference |title=A decade of MEMS and its future |author=H. Fujita |conference= Tenth Annual International Workshop on Micro Electro Mechanical Systems |year=1997 |url=https://ieeexplore.ieee.org/document/581729}}</ref> and are used in a variety of commercial and military applications. Examples include ]s, ]s, and ]s and ]s used to deploy automobile ]s. * Very small mechanical devices driven by electricity can be integrated onto chips, a technology known as ] (MEMS). These devices were developed in the late 1980s<ref>{{cite conference |title=A decade of MEMS and its future |author=Fujita, H. |conference= Tenth Annual International Workshop on Micro Electro Mechanical Systems |year=1997 |doi=10.1109/MEMSYS.1997.581729 }}</ref> and are used in a variety of commercial and military applications. Examples include ]s, ]s, and ]s and ]s used to deploy automobile ]s.
* Since the early 2000s, the integration of optical functionality (]) into silicon chips has been actively pursued in both academic research and in industry resulting in the successful commercialization of silicon based integrated optical transceivers combining optical devices (modulators, detectors, routing) with CMOS based electronics.<ref>{{cite journal|author = A. Narasimha|title = A 40-Gb/s QSFP optoelectronic transceiver in a 0.13 µm CMOS silicon-on-insulator technology|year = 2008|journal = Proceedings of the Optical Fiber Communication Conference (OFC)|page = OMK7|url=http://www.opticsinfobase.org/abstract.cfm?URI=OFC-2008-OMK7|display-authors=etal}}</ref> ] are also being developed, using the emerging field of physics known as ]. * Since the early 2000s, the integration of optical functionality (]) into silicon chips has been actively pursued in both academic research and in industry resulting in the successful commercialization of silicon based integrated optical transceivers combining optical devices (modulators, detectors, routing) with CMOS based electronics.<ref>{{cite journal|author = Narasimha, A. |title = A 40-Gb/s QSFP optoelectronic transceiver in a 0.13 µm CMOS silicon-on-insulator technology|year = 2008|journal = Proceedings of the Optical Fiber Communication Conference (OFC)|page = OMK7|url=http://www.opticsinfobase.org/abstract.cfm?URI=OFC-2008-OMK7|display-authors=etal}}</ref> ]s that use light such as Lightelligence's PACE (Photonic Arithmetic Computing Engine) also being developed, using the emerging field of physics known as ].<ref>{{cite web | url=https://physicsworld.com/a/optical-chipmaker-focuses-on-high-performance-computing/ | title=Optical chipmaker focuses on high-performance computing | date=7 April 2022 }}</ref>
* Integrated circuits are also being developed for ] applications in ] or other ] devices.<ref name= Birkholz2015>{{cite journal |author1=M. Birkholz |author2=A. Mai |author3=C. Wenger |author4=C. Meliani |author5=R. Scholz | url = https://www.researchgate.net/publication/282052331 | title = Technology modules from micro- and nano-electronics for the life sciences | journal = WIREs Nanomed. Nanobiotech. | volume = 8 |issue=3 | pages = 355–377 | year = 2016 | doi = 10.1002/wnan.1367 |pmid=26391194 }}</ref> Special sealing techniques have to be applied in such biogenic environments to avoid ] or ] of the exposed semiconductor materials.<ref name="Graham2011">{{cite journal |author1=A.H.D. Graham |author2=J. Robbins |author3=C.R. Bowen |author4=J. Taylor | title = Commercialisation of CMOS Integrated Circuit Technology in Multi-Electrode Arrays for Neuroscience and Cell-Based Biosensors | journal = Sensors | volume = 11 |issue=5 | pages = 4943–4971 | year = 2011 | doi = 10.3390/s110504943 |pmid=22163884 |pmc=3231360 }}</ref> * Integrated circuits are also being developed for ] applications in ] or other ] devices.<ref name= Birkholz2015>{{cite journal | url = https://www.researchgate.net/publication/282052331 | title = Technology modules from micro- and nano-electronics for the life sciences | journal = WIREs Nanomed. Nanobiotech. | volume = 8 |issue=3 | pages = 355–377 | year = 2016 | doi = 10.1002/wnan.1367 |pmid=26391194 | last1 = Birkholz | first1 = M. | last2 = Mai | first2 = A. | last3 = Wenger | first3 = C. | last4 = Meliani | first4 = C. | last5 = Scholz | first5 = R. }}</ref> Special sealing techniques have to be applied in such biogenic environments to avoid ] or ] of the exposed semiconductor materials.<ref name="Graham2011">{{cite journal | title = Commercialisation of CMOS Integrated Circuit Technology in Multi-Electrode Arrays for Neuroscience and Cell-Based Biosensors | journal = Sensors | volume = 11 |issue=5 | pages = 4943–4971 | year = 2011 | doi = 10.3390/s110504943 |pmid=22163884 |pmc=3231360 | last1 = Graham | first1 = Anthony H. D. | last2 = Robbins | first2 = Jon | last3 = Bowen | first3 = Chris R. | last4 = Taylor | first4 = John | bibcode = 2011Senso..11.4943G | doi-access = free }}</ref>
{{As of|2018}}, the vast majority of all transistors are ]s fabricated in a single layer on one side of a chip of silicon in a flat two-dimensional ]. Researchers have produced prototypes of several promising alternatives, such as: {{As of|2018}}, the vast majority of all transistors are ]s fabricated in a single layer on one side of a chip of silicon in a flat two-dimensional ]. Researchers have produced prototypes of several promising alternatives, such as:
* various approaches to stacking several layers of transistors to make a ] (3DIC), such as ], "monolithic 3D",<ref> * various approaches to stacking several layers of transistors to make a ] (3DIC), such as ], "monolithic 3D",<ref>{{cite web |last=Or-Bach |first=Zvi |date=December 23, 2013 |url=http://semimd.com/blog/2013/12/23/why-soi-is-the-future-technology-of-semiconductors/ |title=Why SOI is the Future Technology of Semiconductors |website=semimd.com |archive-url=https://web.archive.org/web/20141129104851/http://semimd.com/blog/2013/12/23/why-soi-is-the-future-technology-of-semiconductors/ |archive-date=29 November 2014 |url-status=usurped}}.
2013.</ref> stacked wire bonding,<ref>{{cite web | title=Samsung's Eight-Stack Flash Shows up in Apple's iPhone 4 | website=Siliconica | date=2010-09-13 | url=https://sst.semiconductor-digest.com/chipworks_real_chips_blog/2010/09/13/samsungs-eight-stack-flash-shows-up-in-apples-iphone-4/}}</ref> and other methodologies.
Zvi Or-Bach. .
2013.</ref> stacked wire bonding,<ref>
.
2010.</ref> and other methodologies.
* transistors built from other materials: ]s, ], ], ] transistor, transistor-like ], ], etc. * transistors built from other materials: ]s, ], ], ] transistor, transistor-like ], ], etc.
* fabricating transistors over the entire surface of a small sphere of silicon.<ref>. NatureInterface.2002.</ref><ref> * fabricating transistors over the entire surface of a small sphere of silicon.<ref>{{cite journal|url=http://www.natureinterface.com/e/ni07/P058-059/|title=Spherical semiconductor radio temperature sensor|journal=Nature Interface|year=2002|pages=58–59|volume=7|author=Yamatake Corporation|archive-url=https://web.archive.org/web/20090107144008/http://www.natureinterface.com/e/ni07/P058-059/|archive-date=7 January 2009}}</ref><ref>
{{Citation {{Citation
| last = Takeda | last = Takeda
| first = Nobuo | first = Nobuo
| year =
| title = MEMS applications of Ball Semiconductor Technology | title = MEMS applications of Ball Semiconductor Technology
| location =
| page =
| url = http://asia.stanford.edu/events/spring01/slides/takedaslides.pdf | url = http://asia.stanford.edu/events/spring01/slides/takedaslides.pdf
| archive-url = https://web.archive.org/web/20150101122744/http://asia.stanford.edu/events/spring01/slides/takedaslides.pdf
| accessdate =
| archive-date = 2015-01-01
| archiveurl = https://web.archive.org/web/20150101122744/http://asia.stanford.edu/events/spring01/slides/takedaslides.pdf
| archivedate = 2015-01-01
}} }}
</ref> </ref>
* modifications to the substrate, typically to make "]" for a ] or other ], possibly leading to a ]. * modifications to the substrate, typically to make "]" for a ] or other ], possibly leading to a ].


As it becomes more difficult to manufacture ever smaller transistors, companies are using ]s/]s, ]s, ], ] and ]s with die stacking to increase performance and reduce size, without having to reduce the size of the transistors. Such techniques are collectively known as ].<ref>{{Cite web|url=https://semiengineering.com/knowledge_centers/packaging/advanced-packaging/|title=Advanced Packaging}}</ref> Advanced packaging is mainly divided into 2.5D and 3D packaging. 2.5D describes approaches such as multi-chip modules while 3D describes approaches where dies are stacked in one way or another, such as package on package and high bandwidth memory. All approaches involve 2 or more dies in a single package.<ref>{{Cite web|url=https://semiengineering.com/knowledge_centers/packaging/advanced-packaging/2-5d-ic/|title=2.5D|work=Semiconductor Engineering}}</ref><ref>{{Cite web|url=https://semiengineering.com/knowledge_centers/packaging/advanced-packaging/3d-ics/|title=3D ICs|work=Semiconductor Engineering}}</ref><ref>{{cite web | title=Chiplet | website=WikiChip | date=2021-02-28 | url=https://en.wikichip.org/chiplet }}</ref><ref>{{Cite magazine|url=https://www.wired.com/story/keep-pace-moores-law-chipmakers-turn-chiplets/|title=To Keep Pace With Moore's Law, Chipmakers Turn to 'Chiplets'|magazine=Wired|date=11 June 2018}}</ref><ref>{{cite web | last=Schodt | first=Christopher | title=This is the year of the CPU 'chiplet' | website=Engadget | date=2019-04-16 | url=https://www.engadget.com/2019-04-16-upscaled-cpu-chiplet.html }}</ref> Alternatively, approaches such as ] stack multiple layers on a single die. A technique has been demonstrated to include microfluidic cooling on integrated circuits, to improve cooling performance<ref>{{cite web | url=https://spectrum.ieee.org/codesigning-electronics-and-microfluidics-for-a-cooling-boost | title=Building Power Electronics with Microscopic Plumbing Could Save Enormous Amounts of Money - IEEE Spectrum }}</ref> as well as peltier thermoelectric coolers on solder bumps, or thermal solder bumps used exclusively for heat dissipation, used in ].<ref>{{cite web | url=https://arstechnica.com/gadgets/2008/01/startup-shrinks-the-peltier-cooler-and-puts-it-inside-the-chip-package/ | title=Startup shrinks Peltier cooler, puts it in the chip package | date=10 January 2008 }}</ref><ref>{{cite web | url=https://sst.semiconductor-digest.com/2005/07/wire-bond-vs-flip-chip-packaging/ | title=Wire Bond Vs. Flip Chip Packaging &#124; Semiconductor Digest | date=10 December 2016 }}</ref>
As it becomes more difficult to manufacture ever smaller transistors, companies are using ]s, ]s, ], ], and ]s to increase performance and reducing size, without having to reduce the size of the transistors.<ref> cites IEDM 2017, Dr. Lisa Su accessdate=2019-05-26</ref><ref></ref><ref></ref>


==Design== ==Design==
{{main|Electronic design automation|Hardware description language}} {{main|Electronic design automation|Hardware description language|Integrated circuit design}}
The cost of ] and developing a complex integrated circuit is quite high, normally in the multiple tens of millions of dollars.<ref>{{cite web |title=FinFET Rollout Slower Than Expected |url=http://semiengineering.com/finfet-rollout-slower-than-expected/ |publisher=Semiconductor Engineering |date=16 April 2015 |author=Mark LaPedus}}</ref><ref>{{Cite journal|last=Basu|first=Joydeep|date=2019-10-09|title=From Design to Tape-out in SCL 180 nm CMOS Integrated Circuit Fabrication Technology|journal=IETE Journal of Education|volume=60|issue=2|pages=51–64|doi=10.1080/09747338.2019.1657787|arxiv=1908.10674}}</ref> Therefore, it only makes economic sense to produce integrated circuit products with high production volume, so the ] (NRE) costs are spread across typically millions of production units. ], down to the polysilicon (pink), wells (greyish), and substrate (green)]]The cost of ] and developing a complex integrated circuit is quite high, normally in the multiple tens of millions of dollars.<ref>{{cite web |title=FinFET Rollout Slower Than Expected |url=http://semiengineering.com/finfet-rollout-slower-than-expected/ |publisher=Semiconductor Engineering |date=16 April 2015 |author=LaPedus, Mark }}</ref><ref>{{Cite journal|last=Basu|first=Joydeep|date=2019-10-09|title=From Design to Tape-out in SCL 180 nm CMOS Integrated Circuit Fabrication Technology|journal=IETE Journal of Education|volume=60|issue=2|pages=51–64|doi=10.1080/09747338.2019.1657787|arxiv=1908.10674|s2cid=201657819}}</ref> Therefore, it only makes economic sense to produce integrated circuit products with high production volume, so the ] (NRE) costs are spread across typically millions of production units.


Modern semiconductor chips have billions of components, and are too complex to be designed by hand. Software tools to help the designer are essential. Electronic Design Automation ('''EDA'''), also referred to as Electronic ] ('''ECAD'''),<ref>{{cite web|title=About the EDA Industry|url=http://www.edac.org/industry|publisher=Electronic Design Automation Consortium|accessdate=29 July 2015|url-status=dead|archiveurl=https://web.archive.org/web/20150802073506/http://www.edac.org/industry|archivedate=2 August 2015|df=dmy-all}}</ref> is a category of ] for designing ], including integrated circuits. The tools work together in a ] that engineers use to design and analyze entire semiconductor chips. Modern semiconductor chips have billions of components, and are far too complex to be designed by hand. Software tools to help the designer are essential. ] (EDA), also referred to as electronic ] (ECAD),<ref>{{cite web|title=About the EDA Industry|url=http://www.edac.org/industry|publisher=]|access-date=29 July 2015|url-status=dead|archive-url=https://web.archive.org/web/20150802073506/http://www.edac.org/industry|archive-date=2 August 2015}}</ref> is a category of ] for designing ], including integrated circuits. The tools work together in a ] that engineers use to design, verify, and analyze entire semiconductor chips. Some of the latest EDA tools use ] (AI) to help engineers save time and improve chip performance.


== Types == == Types ==
]]]
{{More citations needed|date=January 2018}}
Integrated circuits can be broadly classified into ],<ref>{{cite book |title=Analysis and Design of Analog Integrated Circuits |author1=Gray, Paul R. |author2=Hurst, Paul J. |author3=Lewis, Stephen H. |author4=Meyer, Robert G. |isbn=978-0-470-24599-6 |publisher=Wiley |year=2009 }}</ref> ]<ref>{{cite book |title=Digital Integrated Circuits |author1=Rabaey, Jan M. |author2=Chandrakasan, Anantha |author3=Nikolic, Borivoje |isbn=978-0-13-090996-1 |publisher=Pearson |year=2003 |url=https://archive.org/details/agilesoftwaredev00robe |edition=2nd }}</ref> and ],<ref>{{cite book |title=CMOS: Mixed-Signal Circuit Design |author=Baker, Jacob |publisher=Wiley |isbn=978-0-470-29026-2 |year=2008}}</ref> consisting of analog and digital signaling on the same IC.
] ] IC in a ]]]
Integrated circuits can be classified into ],<ref>{{cite book |title=Analysis and Design of Analog Integrated Circuits |author1=Paul R. Gray |author2=Paul J. Hurst |author3=Stephen H. Lewis |author4=Robert G. Meyer |isbn=978-0-470-24599-6 |publisher=Wiley |year=2009 }}</ref> ]<ref>{{cite book |title=Digital Integrated Circuits (2nd Edition) |author1=Jan M. Rabaey |author2=Anantha Chandrakasan |author3=Borivoje Nikolic |isbn=978-0-13-090996-1 |publisher=Pearson |year=2003 |url=https://archive.org/details/agilesoftwaredev00robe }}</ref> and ],<ref>{{cite book |title=CMOS: Mixed-Signal Circuit Design |author=Jacob Baker |publisher=Wiley |isbn=978-0-470-29026-2 |year=2008}}</ref> consisting of both analog and digital signaling on the same IC.


Digital integrated circuits can contain anywhere from one<ref>{{cite web |url=http://pdf.datasheetcatalog.com/datasheets/70/109237_DS.pdf |title=CD4068 data sheet |publisher=Intersil}}</ref> to billions<ref name=Pascal/> of ]s, ], ]s, and other circuits in a few square millimeters. The small size of these circuits allows high speed, low power dissipation, and reduced ] compared with board-level integration. These digital ICs, typically ]s, ], and ]s, work using ] to process ]. Digital integrated circuits can contain billions<ref name=Pascal/> of ]s, ], ]s, and other circuits in a few square millimeters. The small size of these circuits allows high speed, low power dissipation, and reduced ] compared with board-level integration. These digital ICs, typically ]s, ], and ]s, use ] to process ].


] from an Intel ], an 8-bit ] ] that includes a ] running at 12&nbsp;MHz, 128 bytes of ], 2048 bytes of ], and ] in the same chip]] ] from an Intel ], an 8-bit ] ] that includes a ] running at 12&nbsp;MHz, 128 bytes of ], 2048 bytes of ], and ] in the same chip]]
Among the most advanced integrated circuits are the ]s or "''']'''", which control everything from personal computers and cellular phones to digital ]s. Digital ] and ]s (ASICs) are examples of other families of integrated circuits that are important to the modern ]. Among the most advanced integrated circuits are the ]s or "''']'''", used in personal computers, cell-phones, etc. Several cores may be integrated together in a single IC or chip. Digital ] and ]s (ASICs) are examples of other families of integrated circuits.


In the 1980s, ]s were developed. These devices contain circuits whose logical function and connectivity can be programmed by the user, rather than being fixed by the integrated circuit manufacturer. This allows a single chip to be programmed to implement different LSI-type functions such as ]s, ] and ]. Programmability comes in at least four forms - devices that can be ], devices that can be erased and then re-programmed ], devices that can be (re)programmed using ], and ]s (FPGAs) which can be programmed at any time, including during operation. Current FPGAs can (as of 2016) implement the equivalent of millions of gates and operate at ] up to 1 ].<ref name="Altera">{{cite news In the 1980s, ]s were developed. These devices contain circuits whose logical function and connectivity can be programmed by the user, rather than being fixed by the integrated circuit manufacturer. This allows a chip to be programmed to do various LSI-type functions such as ]s, ] and ]. Programmability comes in various forms devices that can be ], devices that can be erased and then re-programmed ], devices that can be (re)programmed using ], and ]s (FPGAs) which can be programmed at any time, including during operation. Current FPGAs can (as of 2016) implement the equivalent of millions of gates and operate at ] up to 1 ].<ref name="Altera">{{cite news
|url = https://www.altera.com/en_US/pdfs/literature/hb/stratix-10/s10-overview.pdf |url = https://www.altera.com/en_US/pdfs/literature/hb/stratix-10/s10-overview.pdf
|title = Stratix 10 Device Overview |title = Stratix 10 Device Overview
|work = ] |work = ]
|date = 12 December 2015 |date = 12 December 2015
|accessdate = 18 Nov 2016
}}</ref> }}</ref>


Analog ICs, such as ]s, ], and ]s (op-amps), work by processing ]s. They perform analog functions such as ], ]ing, ], and ]. Analog ICs ease the burden on circuit designers by having expertly designed analog circuits available instead of designing and/or constructing a difficult analog circuit from scratch. Analog ICs, such as ]s, ], and ]s (op-amps), process ]s, and perform analog functions such as ], ]ing, ], and ].


ICs can also combine analog and digital circuits on a single chip to create functions such as ]s and ]s. Such mixed-signal circuits offer smaller size and lower cost, but must carefully account for signal interference. Prior to the late 1990s, ] could not be fabricated in the same low-cost ] processes as microprocessors. But since 1998, a large number of radio chips have been developed using ] processes. Examples include Intel's ] cordless phone, or ] (]) chips created by ] and other companies.<ref name="IEEE-CMOS-dualband-n">{{cite web|last1=Nathawad|first1=L.|last2=Zargari|first2=M.|last3=Samavati|first3=H.|last4=Mehta|first4=S.|last5=Kheirkhaki|first5=A.|last6=Chen|first6=P.|last7=Gong|first7=K.|last8=Vakili-Amini|first8=B.|last9=Hwang|first9=J.|last10=Chen|first10=M.|last11=Terrovitis|first11=M.|last12=Kaczynski|first12=B.|last13=Limotyrakis|first13=S.|last14=Mack|first14=M.|last15=Gan|first15=H.|last16=Lee|first16=M.|last17=Abdollahi-Alibeik|first17=B.|last18=Baytekin|first18=B.|last19=Onodera|first19=K.|last20=Mendis|first20=S.|last21=Chang|first21=A.|last22=Jen|first22=S.|last23=Su|first23=D.|last24=Wooley|first24=B.|title=20.2: A Dual-band CMOS MIMO Radio SoC for IEEE 802.11n Wireless LAN|url=http://www.ewh.ieee.org/r6/scv/ssc/May2008_WLAN.pdf|website=IEEE Entity Web Hosting|publisher=IEEE|accessdate=22 October 2016}}</ref> ICs can combine analog and digital circuits on a chip to create functions such as ]s and ]s. Such mixed-signal circuits offer smaller size and lower cost, but must account for signal interference. Prior to the late 1990s, ] could not be fabricated in the same low-cost ] processes as microprocessors. But since 1998, radio chips have been developed using ] processes. Examples include Intel's ] cordless phone, or ] (]) chips created by ] and other companies.<ref name="IEEE-CMOS-dualband-n">{{cite web|last1=Nathawad|first1=L.|last2=Zargari|first2=M.|last3=Samavati|first3=H.|last4=Mehta|first4=S.|last5=Kheirkhaki|first5=A.|last6=Chen|first6=P.|last7=Gong|first7=K.|last8=Vakili-Amini|first8=B.|last9=Hwang|first9=J.|last10=Chen|first10=M.|last11=Terrovitis|first11=M.|last12=Kaczynski|first12=B.|last13=Limotyrakis|first13=S.|last14=Mack|first14=M.|last15=Gan|first15=H.|last16=Lee|first16=M.|last17=Abdollahi-Alibeik|first17=B.|last18=Baytekin|first18=B.|last19=Onodera|first19=K.|last20=Mendis|first20=S.|last21=Chang|first21=A.|last22=Jen|first22=S.|last23=Su|first23=D.|last24=Wooley|first24=B.|title=20.2: A Dual-band CMOS MIMO Radio SoC for IEEE 802.11n Wireless LAN|url=http://www.ewh.ieee.org/r6/scv/ssc/May2008_WLAN.pdf|website=IEEE Entity Web Hosting|publisher=IEEE|access-date=22 October 2016|archive-date=23 October 2016|archive-url=https://web.archive.org/web/20161023053607/http://www.ewh.ieee.org/r6/scv/ssc/May2008_WLAN.pdf|url-status=dead}}</ref>


Modern ] often further sub-categorize the huge variety of integrated circuits now available: Modern ] often further sub-categorize integrated circuits:
* ] are further sub-categorized as logic ICs (such as ] and ]), ]s (such as ] and ] memory), interface ICs (], ], etc.), ]s, and ]. * ] are categorized as logic ICs (such as ] and ]), ]s (such as ] and ] memory), interface ICs (], ], etc.), ]s, and ].
* ] are further sub-categorized as ]s and ]s (] circuits). * ] are categorized as ]s and ]s (] circuits).
* ]s are further sub-categorized as ] ICs (including ]s, ]s, ]s), ], ] (SC) circuits, and ] circuits. * ]s are categorized as ] ICs (including ]s, ]s, ]s), ], ] (SC) circuits, and ] circuits.
* ]s (3D ICs) are further sub-categorized into ] (TSV) ICs and Cu-Cu connection ICs. * ]s (3D ICs) are categorized into ] (TSV) ICs and Cu-Cu connection ICs.


== Manufacturing == == Manufacturing ==
{{more citations needed|section|date=May 2022}}


=== Fabrication === === Fabrication ===
{{Main|Semiconductor device fabrication|l1=Semiconductor fabrication}} {{Main|Semiconductor device fabrication|l1=Semiconductor fabrication}}
] with three metal layers (] has been removed). The sand-colored structures are metal ], with the vertical pillars being contacts, typically plugs of tungsten. The reddish structures are polysilicon gates, and the solid at the bottom is the ] bulk.]] ] with three metal layers (] has been removed). The sand-colored structures are metal ], with the vertical pillars being contacts, typically plugs of ]. The reddish structures are polysilicon gates, and the solid at the bottom is the ] bulk.]]
] chip, as built in the early 2000s. The graphic shows LDD-MISFET's on an SOI substrate with five metallization layers and solder bump for flip-chip bonding. It also shows the section for ] (front-end of line), ] (back-end of line) and first parts of back-end process.]] ] chip, as built in the early 2000s. The graphic shows LDD-MISFET's on an SOI substrate with five metallization layers and solder bump for flip-chip bonding. It also shows the section for ] (front-end of line), ] (back-end of line) and first parts of back-end process.]]


The ]s of the ] of the ]s were identified as the most likely materials for a ''] ]''. Starting with ], proceeding to ], then ], the materials were systematically studied in the 1940s and 1950s. Today, ] is the main ] used for ICs although some III-V compounds of the periodic table such as ] are used for specialized applications like ], ]s, ]s and the highest-speed integrated circuits. It took decades to perfect methods of creating ]s with minimal ] in semiconducting materials' ]. The ]s of the ] of the ]s were identified as the most likely materials for a ''] ]''. Starting with ], proceeding to ], then ], the materials were systematically studied in the 1940s and 1950s. Today, ] is the main ] used for ICs although some III-V ] such as ] are used for specialized applications like ], ]s, ]s and the highest-speed integrated circuits. It took decades to perfect methods of creating ]s with minimal ] in semiconducting materials' ].


] ICs are fabricated in a ] which includes three key process steps{{snd}} ], deposition (such as ]), and ]. The main process steps are supplemented by doping and cleaning. ] ICs are fabricated in a ] which includes three key process steps{{snd}} ], deposition (such as ]), and ]. The main process steps are supplemented by doping and cleaning. More recent or high-performance ICs may instead use ] ] or ] transistors instead of planar ones, starting at the 22&nbsp;nm node (Intel) or 16/14&nbsp;nm nodes.<ref>{{cite web | title=16nm/14nm FinFETs: Enabling The New Electronics Frontier | website=electronicdesign.com| url=https://www.electronicdesign.com/technologies/embedded/digital-ics/article/21795644/16nm14nm-finfets-enabling-the-new-electronics-frontier | date=January 17, 2013}}</ref>


] ] are used in most applications (or for special applications, other semiconductors such as ] are used). The wafer need not be entirely silicon. ] is used to mark different areas of the substrate to be ] or to have polysilicon, insulators or metal (typically aluminium or copper) tracks deposited on them. ]s are impurities intentionally introduced to a semiconductor to modulate its electronic properties. Doping is the process of adding dopants to a semiconductor material. ] ] are used in most applications (or for special applications, other semiconductors such as ] are used). The wafer need not be entirely silicon. ] is used to mark different areas of the substrate to be ] or to have polysilicon, insulators or metal (typically aluminium or copper) tracks deposited on them. ]s are impurities intentionally introduced to a semiconductor to modulate its electronic properties. Doping is the process of adding dopants to a semiconductor material.
{{anchor|circuitLayers}}
* Integrated circuits are composed of many overlapping layers, each defined by photolithography, and normally shown in different colors. Some layers mark where various dopants are diffused into the substrate (called diffusion layers), some define where additional ions are implanted (implant layers), some define the conductors (doped polysilicon or metal layers), and some define the connections between the conducting layers (via or contact layers). All components are constructed from a specific combination of these layers. * Integrated circuits are composed of many overlapping layers, each defined by photolithography, and normally shown in different colors. Some layers mark where various dopants are diffused into the substrate (called diffusion layers), some define where additional ions are implanted (implant layers), some define the conductors (doped polysilicon or metal layers), and some define the connections between the conducting layers (via or contact layers). All components are constructed from a specific combination of these layers.
* In a self-aligned ] process, a ] is formed wherever the gate layer (polysilicon or metal) crosses a diffusion layer. * In a self-aligned ] process, a ] is formed wherever the gate layer (polysilicon or metal) ] a diffusion layer (this is called ]).<ref name="selfAlignedCmos">{{cite book |last1=Mead |first1=Carver |last2=Conway |first2=Lynn |year=1991 |title=Introduction to VLSI systems |publisher=Addison Wesley Publishing Company |isbn=978-0-201-04358-7 |oclc=634332043 |url=https://archive.org/details/introductiontovl00mead |author-link1 = Carver Mead | author-link2 = Lynn Conway}}</ref>{{rp|p.1 (see Fig. 1.1)}}
* ], in form very much like the ] of a traditional electrical ], are formed according to the area of the "plates", with insulating material between the plates. Capacitors of a wide range of sizes are common on ICs. * ], in form very much like the ] of a traditional electrical ], are formed according to the area of the "plates", with insulating material between the plates. Capacitors of a wide range of sizes are common on ICs.
* Meandering stripes of varying lengths are sometimes used to form on-chip ]s, though most ]s do not need any resistors. The ratio of the length of the resistive structure to its width, combined with its sheet resistivity, determines the resistance. * Meandering stripes of varying lengths are sometimes used to form on-chip ]s, though most ]s do not need any resistors. The ratio of the length of the resistive structure to its width, combined with its sheet resistivity, determines the resistance.
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A ] is the most regular type of integrated circuit; the highest density devices are thus memories; but even a ] will have memory on the chip. (See the regular array structure at the bottom of the first image.{{Which|date=October 2018}}) Although the structures are intricate – with widths which have been shrinking for decades – the layers remain much thinner than the device widths. The layers of material are fabricated much like a photographic process, although light ]s in the ] cannot be used to "expose" a layer of material, as they would be too large for the features. Thus ]s of higher frequencies (typically ]) are used to create the patterns for each layer. Because each feature is so small, ]s are essential tools for a ] engineer who might be ] a fabrication process. A ] is the most regular type of integrated circuit; the highest density devices are thus memories; but even a ] will have memory on the chip. (See the regular array structure at the bottom of the first image.{{Which|date=October 2018}}) Although the structures are intricate – with widths which have been shrinking for decades – the layers remain much thinner than the device widths. The layers of material are fabricated much like a photographic process, although light ]s in the ] cannot be used to "expose" a layer of material, as they would be too large for the features. Thus ]s of higher frequencies (typically ]) are used to create the patterns for each layer. Because each feature is so small, ]s are essential tools for a ] engineer who might be ] a fabrication process.


Each device is tested before packaging using automated test equipment (ATE), in a process known as ], or wafer probing. The wafer is then cut into rectangular blocks, each of which is called a '']''. Each good die (plural ''dice'', ''dies'', or ''die'') is then connected into a package using ] (or gold) ] which are ]<ref><!-- Coucoulas, A., http://commons.wikimedia.org/File:Hot_Work_Ultrasonic_(Thermosonic)_Bonding_549-556.pdf DELETED--> , Proc. 20th IEEE Electronic Components Conf. Washington, D.C., May 1970, pp. 549–556.]</ref> to ''pads'', usually found around the edge of the die. ] was first introduced by A. Coucoulas which provided a reliable means of forming these vital electrical connections to the outside world. After packaging, the devices go through final testing on the same or similar ATE used during wafer probing. ] can also be used. Test cost can account for over 25% of the cost of fabrication on lower-cost products, but can be negligible on low-yielding, larger, or higher-cost devices. Each device is tested before packaging using automated test equipment (ATE), in a process known as ], or wafer probing. The wafer is then cut into rectangular blocks, each of which is called a '']''. Each good die (plural ''dice'', ''dies'', or ''die'') is then connected into a package using ] (or gold) ] which are ]<ref><!-- Coucoulas, A., http://commons.wikimedia.org/File:Hot_Work_Ultrasonic_(Thermosonic)_Bonding_549-556.pdf DELETED--> , Proc. 20th IEEE Electronic Components Conf. Washington, D.C., May 1970, pp. 549–556.]</ref> to ''pads'', usually found around the edge of the die. ] was first introduced by A. Coucoulas which provided a reliable means of forming these vital electrical connections to the outside world. After packaging, the devices go through final testing on the same or similar ATE used during wafer probing. ] can also be used. Test cost can account for over 25% of the cost of fabrication on lower-cost products, but can be negligible on low-yielding, larger, or higher-cost devices.


{{As of|2016}}, a ] (commonly known as a ''semiconductor fab'') can cost over US$8 billion to construct.<ref>{{cite web |title=How Intel Makes a Chip |date=June 9, 2016 |author1=Max Chafkin |author2=Ian King |publisher=Bloomburg Businessweek |url=https://www.bloomberg.com/news/articles/2016-06-09/how-intel-makes-a-chip}}</ref> The cost of a fabrication facility rises over time because of increased complexity of new products. This is known as ]. Today, the most advanced ] employ the following techniques: {{As of|2022}}, a ] (commonly known as a ''semiconductor fab'') can cost over US$12 billion to construct.<ref>{{cite web |title=TSMC to build 5nm fab in arizona, set to come online in 2024 |date=15 May 2020 |author1=Chafkin |publisher=Anandtech |url=https://www.anandtech.com/show/15803/tsmc-build-5nm-fab-in-arizona-for-2024}}</ref> The cost of a fabrication facility rises over time because of increased complexity of new products; this is known as ]. Such a facility features:
* The ] are up to 300&nbsp;mm in diameter (wider than a common ]). * The ] up to 300&nbsp;mm in diameter (wider than a common ]).
* {{As of|2022}}, 5&nbsp;nm transistors.
* {{Update inline span|text={{As of|2016}}, a state of the art foundry can produce 14 nm transistors, as implemented by Intel, TSMC, Samsung, and GlobalFoundries. The next step, to 10 nm devices, is expected in 2017.|date=October 2018|reason=In 2018, we see 7 nm and soon expect 5 nm processes}}<ref>{{cite web |title=10 nm Fab Watch |author=Mark Lapedus |publisher=Semiconductor Engineering |url=http://semiengineering.com/10nm-fab-watch/ |date=May 21, 2015}}</ref>
* ]s where copper wiring replaces aluminum for interconnects. * ]s where copper wiring replaces aluminum for interconnects.
* ] ]. * ] ].
* ] (SOI). * ] (SOI).
* ] in a process used by ] known as ] (SSDOI). * ] in a process used by ] known as ] (SSDOI).
* ]s such as tri-gate transistors being manufactured by ] from 2011 in their ] process. * ]s such as tri-gate transistors.

ICs can be manufactured either in-house by ]s (IDMs) or using the ]. IDMs are vertically integrated companies (like ] and ]) that design, manufacture and sell their own ICs, and may offer design and/or manufacturing (foundry) services to other companies (the latter often to ]). In the foundry model, fabless companies (like ]) only design and sell ICs and outsource all manufacturing to ] such as ]. These foundries may offer IC design services.


=== Packaging === === Packaging ===
{{Main|Integrated circuit packaging}} {{Main|Integrated circuit packaging}}
] chip made in 1977, part of a four-chip calculator set designed in 1970<ref>{{cite web | url=http://www.155la3.ru/k145_3.htm#k145hk1 | title = 145 series ICs (in Russian) | accessdate=22 April 2012 }}</ref>]] ] chip made in 1977, part of a four-chip calculator set designed in 1970<ref>{{cite web | url=http://www.155la3.ru/k145_3.htm#k145hk1 | title = 145 series ICs (in Russian) | access-date=22 April 2012 }}</ref>]]


The earliest integrated circuits were packaged in ceramic ], which continued to be used by the military for their reliability and small size for many years. Commercial circuit packaging quickly moved to the ] (DIP), first in ceramic and later in plastic. In the 1980s pin counts of VLSI circuits exceeded the practical limit for DIP packaging, leading to ] (PGA) and ] (LCC) packages. ] packaging appeared in the early 1980s and became popular in the late 1980s, using finer lead pitch with leads formed as either gull-wing or J-lead, as exemplified by the ] (SOIC) package – a carrier which occupies an area about 30–50% less than an equivalent DIP and is typically 70% thinner. This package has "gull wing" leads protruding from the two long sides and a lead spacing of 0.050&nbsp;inches. The earliest integrated circuits were packaged in ceramic ], which continued to be used by the military for their reliability and small size for many years. Commercial circuit packaging quickly moved to the ] (DIP), first in ceramic and later in plastic, which is commonly ]-]-]. In the 1980s pin counts of ] circuits exceeded the practical limit for DIP packaging, leading to ] (PGA) and ] (LCC) packages. ] packaging appeared in the early 1980s and became popular in the late 1980s, using finer lead pitch with leads formed as either gull-wing or J-lead, as exemplified by the ] (SOIC) package – a carrier which occupies an area about 30–50% less than an equivalent DIP and is typically 70% thinner. This package has "gull wing" leads protruding from the two long sides and a lead spacing of 0.050&nbsp;inches.


In the late 1990s, ] (PQFP) and ] (TSOP) packages became the most common for high pin count devices, though PGA packages are still used for high-end ]s. In the late 1990s, ] (PQFP) and ] (TSOP) packages became the most common for high pin count devices, though PGA packages are still used for high-end ]s.


] (BGA) packages have existed since the 1970s. ] packages, which allow for much higher pin count than other package types, were developed in the 1990s. In an FCBGA package the die is mounted upside-down (flipped) and connects to the package balls via a package substrate that is similar to a printed-circuit board rather than by wires. FCBGA packages allow an array of ] signals (called Area-I/O) to be distributed over the entire die rather than being confined to the die periphery. BGA devices have the advantage of not needing a dedicated socket, but are much harder to replace in case of device failure. ] (BGA) packages have existed since the 1970s. ] packages, which allow for a much higher pin count than other package types, were developed in the 1990s. In an FCBGA package, the die is mounted upside-down (flipped) and connects to the package balls via a package substrate that is similar to a printed-circuit board rather than by wires. FCBGA packages allow an array of ] signals (called Area-I/O) to be distributed over the entire die rather than being confined to the die periphery. BGA devices have the advantage of not needing a dedicated socket but are much harder to replace in case of device failure.


Intel transitioned away from PGA to ] (LGA) and BGA beginning in 2004, with the last PGA socket released in 2014 for mobile platforms. {{As of|2018}}, AMD uses PGA packages on mainstream desktop processors,<ref>{{Cite news|url=https://wccftech.com/amd-am4-socket-zen-bristol-bridge-soc-package-pictured/|title=AMD Zen CPU & AM4 Socket Pictured, Launching February 2017 – PGA Design With 1331 Pins Confirmed|last=Moammer|first=Khalid|date=2016-09-16|work=Wccftech|access-date=2018-05-20|language=en-US}}</ref> BGA packages on mobile processors,<ref>{{Cite news|url=https://en.wikichip.org/amd/ryzen_5/2500u|title=Ryzen 5 2500U – AMD – WikiChip|access-date=2018-05-20|language=en}}</ref> and high-end desktop and server microprocessors use LGA packages.<ref>{{Cite news|url=https://www.pcworld.com/article/3198924/computers/amds-tr4-threadripper-cpu-socket-is-gigantic.html|title=AMD's 'TR4' Threadripper CPU socket is gigantic|work=PCWorld|access-date=2018-05-20|language=en}}</ref> Intel transitioned away from PGA to ] (LGA) and BGA beginning in 2004, with the last PGA socket released in 2014 for mobile platforms. {{As of|2018}}, AMD uses PGA packages on mainstream desktop processors,<ref>{{Cite news|url=https://wccftech.com/amd-am4-socket-zen-bristol-bridge-soc-package-pictured/|title=AMD Zen CPU & AM4 Socket Pictured, Launching February 2017 – PGA Design With 1331 Pins Confirmed|last=Moammer|first=Khalid|date=2016-09-16|work=Wccftech|access-date=2018-05-20}}</ref> BGA packages on mobile processors,<ref>{{Cite news|url=https://en.wikichip.org/amd/ryzen_5/2500u|title=Ryzen 5 2500U – AMD – WikiChip|access-date=2018-05-20|publisher=wikichip.org}}</ref> and high-end desktop and server microprocessors use LGA packages.<ref>{{Cite news|url=https://www.pcworld.com/article/3198924/computers/amds-tr4-threadripper-cpu-socket-is-gigantic.html|title=AMD's 'TR4' Threadripper CPU socket is gigantic|work=PCWorld|access-date=2018-05-20|author=Ung, Gordon Mah |date=May 30, 2017}}</ref>


Electrical signals leaving the die must pass through the material electrically connecting the die to the package, through the conductive traces (paths) in the package, through the leads connecting the package to the conductive traces on the ]. The materials and structures used in the path these electrical signals must travel have very different electrical properties, compared to those that travel to different parts of the same die. As a result, they require special design techniques to ensure the signals are not corrupted, and much more electric power than signals confined to the die itself. Electrical signals leaving the die must pass through the material electrically connecting the die to the package, through the conductive ] (paths) in the package, through the leads connecting the package to the conductive traces on the ]. The materials and structures used in the path these electrical signals must travel have very different electrical properties, compared to those that travel to different parts of the same die. As a result, they require special design techniques to ensure the signals are not corrupted, and much more electric power than signals confined to the die itself.


When multiple dies are put in one package, the result is a ], abbreviated {{Abbr|SiP|System in Package}}. A ] ({{Abbr|MCM|multi-chip module}}), is created by combining multiple dies on a small substrate often made of ceramic. The distinction between a large MCM and a small printed circuit board is sometimes fuzzy. When multiple dies are put in one package, the result is a ], abbreviated {{Abbr|SiP|System in Package}}. A ] ({{Abbr|MCM|multi-chip module}}), is created by combining multiple dies on a small substrate often made of ceramic. The distinction between a large MCM and a small printed circuit board is sometimes fuzzy.
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{{Main|Integrated circuit layout design protection}} {{Main|Integrated circuit layout design protection}}


The possibility of copying by photographing each layer of an integrated circuit and preparing ] for its production on the basis of the photographs obtained is a reason for the introduction of legislation for the protection of layout-designs. The ] established intellectual property protection for photomasks used to produce integrated circuits.<ref name="USC-circ100">{{cite web|title=Federal Statutory Protection for Mask Works|url=https://copyright.gov/circs/circ100.pdf|website=United States Copyright Office|publisher=United States Copyright Office|accessdate=22 October 2016}}</ref> The possibility of copying by photographing each layer of an integrated circuit and preparing ] for its production on the basis of the photographs obtained is a reason for the introduction of legislation for the protection of layout designs. The US ] established intellectual property protection for photomasks used to produce integrated circuits.<ref name="USC-circ100">{{cite web|title=Federal Statutory Protection for Mask Works|url=https://copyright.gov/circs/circ100.pdf|website=United States Copyright Office|access-date=22 October 2016}}</ref>


A diplomatic conference was held at Washington, D.C., in 1989, which adopted a Treaty on Intellectual Property in Respect of Integrated Circuits<ref>{{cite web|url=https://www.wipo.int/treaties/en/ip/washington/index.html|title=Washington Treaty on Intellectual Property in Respect of Integrated Circuits|website=www.wipo.int}}</ref> (IPIC Treaty). A diplomatic conference held at Washington, D.C., in 1989 adopted a Treaty on Intellectual Property in Respect of Integrated Circuits,<ref>{{cite web|url=https://www.wipo.int/treaties/en/ip/washington/index.html|title=Washington Treaty on Intellectual Property in Respect of Integrated Circuits|website=www.wipo.int}}</ref> also called the Washington Treaty or IPIC Treaty. The treaty is currently not in force, but was partially integrated into the ] agreement.<ref>On 1 January 1995, the ''Agreement on Trade-Related Aspects of Intellectual Property Rights'' (TRIPs) (Annex 1C to the World Trade Organization (WTO) Agreement), went into force. Part II, section 6 of TRIPs protects semiconductor chip products and was the basis for Presidential Proclamation No. 6780, 23 March 1995, under SCPA § 902(a)(2), extending protection to all present and future WTO members.</ref>


There are several United States patents connected to the integrated circuit, which include patents by ] {{US patent|3138743|US3,138,743}}, {{US patent|3261081|US3,261,081}}, {{US patent|3434015|US3,434,015}} and by R.F. Stewart {{US patent|3138747|US3,138,747}}.
The Treaty on Intellectual Property in respect of Integrated Circuits, also called Washington Treaty or IPIC Treaty (signed at Washington on 26 May 1989) is currently not in force, but was partially integrated into the ] agreement.<ref>On Jan. 1, 1995, the ''Agreement on Trade-Related Aspects of Intellectual Property Rights'' (TRIPs) (Annex 1C to the World Trade Organization (WTO) Agreement), went into force. Part II, section 6 of TRIPs protects semiconductor chip products and was the basis for Presidential Proclamation No. 6780, March 23, 1995, under SCPA § 902(a)(2), extending protection to all present and future WTO members.</ref>


National laws protecting IC layout designs have been adopted in a number of countries, including Japan,<ref>Japan was the first country to enact its own version of the SCPA, the Japanese "Act Concerning the Circuit Layout of a Semiconductor Integrated Circuit" of 1985.</ref> the ],<ref>In 1986 the EC promulgated a directive requiring its members to adopt national legislation for the protection of semiconductor topographies. Council Directive 1987/54/EEC of 16 Dec. 1986 on the ''Legal Protection of Topographies of Semiconductor Products'', art. 1(1)(b), 1987 O.J. (L 24) 36.</ref> the UK, Australia, and Korea. The UK enacted the Copyright, Designs and Patents Act, 1988, c. 48, § 213, after it initially took the position that its copyright law fully protected chip topographies. See ] National laws protecting IC layout designs have been adopted in a number of countries, including Japan,<ref>Japan was the first country to enact its own version of the SCPA, the Japanese "Act Concerning the Circuit Layout of a Semiconductor Integrated Circuit" of 1985.</ref> the ],<ref>In 1986 the EC promulgated a directive requiring its members to adopt national legislation for the protection of semiconductor topographies. Council Directive 1987/54/EEC of 16 December 1986 on the ''Legal Protection of Topographies of Semiconductor Products'', art. 1(1)(b), 1987 O.J. (L 24) 36.</ref> the UK, Australia, and Korea. The UK enacted the Copyright, Designs and Patents Act, 1988, c. 48, § 213, after it initially took the position that its copyright law fully protected chip topographies. See ]


Criticisms of inadequacy of the UK copyright approach as perceived by the US chip industry are summarized in Further chip rights developments.<ref>{{cite web|url=https://ieeexplore.ieee.org/document/4089472|title=-|website=ieeexplore.ieee.org}}</ref> Criticisms of inadequacy of the UK copyright approach as perceived by the US ] are summarized in further chip rights developments.<ref>{{cite journal|doi=10.1109/MM.1985.304489|title=MicroLaw|journal=IEEE Micro|volume=5|issue=4|pages=90–92|year=1985|last1=Stern|first1=Richard}}</ref>


Australia passed the Circuit Layouts Act of 1989 as a ''sui generis'' form of chip protection. Korea passed the ''Act Concerning the Layout-Design of Semiconductor Integrated Circuits''</ref> Australia passed the Circuit Layouts Act of 1989 as a ''sui generis'' form of chip protection.<ref>{{cite journal |last1=Radomsky |first1=Leon |title=Sixteen Years after the Passage of the U.S. Semiconductor Chip Protection Act: Is International Protection Working |journal=Berkeley Technology Law Journal |date=2000 |volume=15 |page=1069 |url=https://heinonline.org/HOL/P?h=hein.journals/berktech15&i=1059 |access-date=13 September 2022}}</ref> Korea passed the ''Act Concerning the Layout-Design of Semiconductor Integrated Circuits'' in 1992.<ref>{{cite journal |last1=Kukkonen |first1=Carl A. III |title=The Need to Abolish Registration for Integrated Circuit Topographies under Trips |journal=IDEA: The Journal of Law and Technology |date=1997–1998 |volume=38 |page=126 |url=https://heinonline.org/HOL/P?h=hein.journals/idea38&i=115 |access-date=13 September 2022}}</ref>

== Other developments ==
{{Update|type=section|date=October 2018}}{{Further|Heat generation in integrated circuits}}

Future developments seem to follow the ] multi-microprocessor paradigm, already used by Intel and AMD multi-core processors. Rapport Inc. and IBM started shipping the ] in 2006, a 256-core microprocessor. Intel, as recently as February–August 2011, unveiled a prototype, "not for commercial sale" chip that bears 80 cores. Each core is capable of handling its own task independently of the others. This is in response to heat-versus-speed limit, that is about to be reached{{When|date=October 2018}} using ] (see: ]). This design provides a new challenge to chip programming. ]s such as the open-source ] programming language are designed to assist with this task.<ref>Biever, C. "Chip revolution poses problems for programmers", New Scientist (Vol 193, Number 2594)</ref>


== Generations == == Generations ==
{{See also|List of semiconductor scale examples|MOS integrated circuit|Transistor count}} {{See also|List of semiconductor scale examples|MOS integrated circuit|Transistor count}}


In the early days of simple integrated circuits, the technology's large scale limited each chip to only a few transistors, and the low degree of integration meant the design process was relatively simple. ] were also quite low by today's standards. As the technology progressed, millions, then billions<ref>Peter Clarke, ''Intel enters billion-transistor processor era'', </ref> of transistors could be placed on one chip, and good designs required thorough planning, giving rise to the field of ], or EDA. In the early days of simple integrated circuits, the technology's large scale limited each chip to only a few ], and the low degree of integration meant the design process was relatively simple. ] were also quite low by today's standards. As ] (MOS) technology progressed, millions and then billions of ]s could be placed on one chip,<ref>{{cite web | last=Clarke | first=Peter | title=Intel enters billion-transistor processor era | website=EE Times | date=2005-10-14 | url=http://www.eetimes.com/electronics-products/processors/4079511/Intel-enters-billion-transistor-processor-era | archive-url=https://web.archive.org/web/20110608072423/http://www.eetimes.com/electronics-products/processors/4079511/Intel-enters-billion-transistor-processor-era | archive-date=2011-06-08 | url-status=live}}</ref> and good designs required thorough planning, giving rise to the field of ], or EDA.
Some SSI and MSI chips, like ]s, are still mass-produced, both to maintain old equipment and build new devices that require only a few gates. The ] of ] chips, for example, has become a ] and remains in production.


{|class="wikitable sortable" {|class="wikitable sortable"
! Acronym !! Name !! Year !! ]<ref>{{cite web |last=Dalmau |first=M. |url=http://www.iutbayonne.univ-pau.fr/~dalmau/documents/cours/archi/MICROPancien.pdf |title=Les Microprocesseurs |website=IUT de Bayonne |access-date=7 June 2015 |archive-date=9 August 2017 |archive-url=https://web.archive.org/web/20170809093452/http://www.iutbayonne.univ-pau.fr/~dalmau/documents/cours/archi/MICROPancien.pdf |url-status=dead }}</ref> || ]s number<ref>{{cite book|language=fr|url=https://books.google.com/books?id=ZbcsAQAAIAAJ&q=ssi+msi+12+99+portes+lsi|title=Bulletin de la Société fribourgeoise des sciences naturelles, Volumes 62 à 63|year=1973}}</ref>
! Name !! Signification !! Year !! ]s number<ref>
http://www.iutbayonne.univ-pau.fr/~dalmau/documents/cours/archi/MICROPancien.pdf</ref> !! ]s number<ref>{{cite book|language=fr|url=https://books.google.com/?id=ZbcsAQAAIAAJ&q=ssi+msi+12+99+portes+lsi&dq=ssi+msi+12+99+portes+lsi|title=Bulletin de la Societe fribourgeoise des sciences naturelles, Volumes 62 à 63|year=1973}}</ref>
|- |-
| SSI || ''small-scale integration'' || 1964 || 1 to 10 || 1 to 12 | SSI || ''small-scale integration'' || 1964 || 1 to 10 || 1 to 12
Line 208: Line 212:
|} |}


===Small-scale integration (SSI) {{Anchor|SSI, MSI and LSI|SSI}}===<!-- This section is linked from ] and Computer fan--> ===Small-scale integration (SSI) ===
{{Anchor|SSI, MSI and LSI|SSI}}
<!-- This section is linked from ] and Computer fan-->


The first integrated circuits contained only a few transistors. Early digital circuits containing tens of transistors provided a few logic gates, and early linear ICs such as the ] SL201 or the ] TAA320 had as few as two transistors. The number of transistors in an integrated circuit has increased dramatically since then. The term "large scale integration" (LSI) was first used by ] scientist ] when describing the theoretical concept;<ref>{{Cite journal|last=Safir|first=Ruben|date=March 2015|title=System On Chip - Integrated Circuits|url=https://books.google.com/?id=JsOmCQAAQBAJ&pg=PT39&lpg=PT39#v=onepage&q&f=false|journal=NYLXS Journal|volume=|pages=|via=|isbn=9781312995512}}</ref> that term gave rise to the terms "small-scale integration" (SSI), "medium-scale integration" (MSI), "very-large-scale integration" (VLSI), and "ultra-large-scale integration" (ULSI). The early integrated circuits were SSI. The first integrated circuits contained only a few transistors. Early digital circuits containing tens of transistors provided a few logic gates, and early linear ICs such as the ] SL201 or the ] TAA320 had as few as two transistors. The number of transistors in an integrated circuit has increased dramatically since then. The term "large scale integration" (LSI) was first used by ] scientist ] when describing the theoretical concept;<ref>{{Cite journal|last=Safir|first=Ruben|date=March 2015|title=System on Chip Integrated Circuits|url=https://books.google.com/books?id=JsOmCQAAQBAJ&pg=PT39|journal=NYLXS Journal|isbn=9781312995512}}</ref> that term gave rise to the terms "small-scale integration" (SSI), "medium-scale integration" (MSI), "very-large-scale integration" (VLSI), and "ultra-large-scale integration" (ULSI). The early integrated circuits were SSI.


SSI circuits were crucial to early ] projects, and aerospace projects helped inspire development of the technology. Both the ] and ] needed lightweight digital computers for their inertial guidance systems. Although the ] led and motivated integrated-circuit technology,<ref>{{cite book |last=Mindell |first=David A. |title=Digital Apollo: Human and Machine in Spaceflight |year=2008 |publisher=The MIT Press |isbn=978-0-262-13497-2}}</ref> it was the Minuteman missile that forced it into mass-production. The Minuteman missile program and various other ] programs accounted for the total $4 million integrated circuit market in 1962, and by 1968, U.S. Government spending on ] and ] still accounted for 37% of the $312 million total production. SSI circuits were crucial to early ] projects, and aerospace projects helped inspire development of the technology. Both the ] and ] needed lightweight digital computers for their inertial guidance systems. Although the ] led and motivated integrated-circuit technology,<ref>{{cite book |last=Mindell |first=David A. |title=Digital Apollo: Human and Machine in Spaceflight |year=2008 |publisher=The MIT Press |isbn=978-0-262-13497-2}}</ref> it was the Minuteman missile that forced it into mass-production. The Minuteman missile program and various other ] programs accounted for the total $4 million integrated circuit market in 1962, and by 1968, U.S. Government spending on ] and ] still accounted for 37% of the $312 million total production.


The demand by the U.S. Government supported the nascent integrated circuit market until costs fell enough to allow IC firms to penetrate the ] market and eventually the ] market. The average price per integrated circuit dropped from $50.00 in 1962 to $2.33 in 1968.<ref>{{cite book| last = Ginzberg| first = Eli| title = Economic impact of large public programs: the NASA Experience| year = 1976| publisher = Olympus Publishing Company| isbn = 978-0-913420-68-3| page = 57 }}</ref> Integrated circuits began to appear in ]s by the turn of the 1970s decade. A typical application was ] inter-carrier sound processing in television receivers. The demand by the U.S. Government supported the nascent integrated circuit market until costs fell enough to allow IC firms to penetrate the ] market and eventually the ] market. The average price per integrated circuit dropped from $50 in 1962 to $2.33 in 1968.<ref>{{cite book| last = Ginzberg| first = Eli| title = Economic impact of large public programs: the NASA Experience| year = 1976| publisher = Olympus Publishing Company| isbn = 978-0-913420-68-3| page = 57 }}</ref> Integrated circuits began to appear in ]s by the turn of the 1970s decade. A typical application was ] inter-carrier sound processing in television receivers.


The first application ] chips were small-scale integration (SSI) chips.<ref name="forging"/> Following ]'s proposal of the ] chip in 1960,<ref name="Moskowitz"/> the earliest experimental MOS chip to be fabricated was a 16-transistor chip built by Fred Heiman and Steven Hofstein at ] in 1962.<ref name="computerhistory-digital"/> The first practical application of MOS SSI chips was for ] ]s.<ref name="forging" /> The first application ] chips were small-scale integration (SSI) chips.<ref name="forging"/> Following ]'s proposal of the ] chip in 1960,<ref name="Moskowitz">{{cite book|last1=Moskowitz|first1=Sanford L.|url=https://books.google.com/books?id=2STRDAAAQBAJ&pg=PA165|title=Advanced Materials Innovation: Managing Global Technology in the 21st century|date=2016|publisher=]|isbn=9780470508923|pages=165–167}}</ref> the earliest experimental MOS chip to be fabricated was a 16-transistor chip built by Fred Heiman and Steven Hofstein at ] in 1962.<ref name="computerhistory-digital"/> The first practical application of MOS SSI chips was for ] ]s.<ref name="forging" />


===Medium-scale integration (MSI) {{Anchor|MSI}}=== ===Medium-scale integration (MSI) {{Anchor|MSI}}===
Line 223: Line 229:
] technology made it possible to build high-density chips.<ref name="computerhistory-transistor"/> By 1964, MOS chips had reached higher ] and lower manufacturing costs than ] chips.<ref name="ieee"/> ] technology made it possible to build high-density chips.<ref name="computerhistory-transistor"/> By 1964, MOS chips had reached higher ] and lower manufacturing costs than ] chips.<ref name="ieee"/>


In 1964, ] demonstrated a single-chip 16-bit ] he designed, with a then-incredible 120 ]s on a single chip.<ref name="forging">{{cite book | title = We were burning: Japanese entrepreneurs and the forging of the electronic age | author = Bob Johnstone | publisher = Basic Books | year = 1999 | isbn = 978-0-465-09118-8 | pages = 47–48 | url = https://books.google.com/books?id=PE1bQS9VpWoC&pg=PA47 }}</ref><ref>{{cite web| url = http://www.eecs.umich.edu/eecs/about/articles/2007/Boysel.html| title = Making Your First Million (and other tips for aspiring entrepreneurs)| author = Lee Boysel| date = 2007-10-12| work = U. Mich. EECS Presentation / ECE Recordings}}</ref> The same year, ] introduced the first commercial ] chip, consisting of 120 ] transistors.<ref>{{cite web|url=http://www.computerhistory.org/semiconductor/timeline/1964-Commecial.html|title=1964 – First Commercial MOS IC Introduced|website=]}}</ref> It was a 20-bit ], developed by Robert Norman<ref name="computerhistory-digital"/> and Frank Wanlass.<ref>{{cite journal |last1=Kilby |first1=J. S. |title=Miniaturized electronic circuits |journal=IEEE Solid-State Circuits Society Newsletter |date=2007 |volume=12 |issue=2 |pages=44–54 |doi=10.1109/N-SSC.2007.4785580 |url=https://www.researchgate.net/publication/245509003 |issn=1098-4232}}</ref> MOS chips further increased in complexity at a rate predicted by ], leading to chips with hundreds of ]s on a chip by the late 1960s.<ref name="ieee"/> In 1964, ] demonstrated a single-chip 16-bit ] he designed, with a then-incredible 120 ]s on a single chip.<ref name="forging">{{cite book | title = We were burning: Japanese entrepreneurs and the forging of the electronic age | author = Johnstone, Bob | publisher = Basic Books | year = 1999 | isbn = 978-0-465-09118-8 | pages = 47–48 | url = https://books.google.com/books?id=PE1bQS9VpWoC&pg=PA47 }}</ref><ref>{{cite web| url = http://www.eecs.umich.edu/eecs/about/articles/2007/Boysel.html| title = Making Your First Million (and other tips for aspiring entrepreneurs)| author = Boysel, Lee | date = 2007-10-12| work = U. Mich. EECS Presentation / ECE Recordings}}</ref> The same year, ] introduced the first commercial ] chip, consisting of 120 ] transistors.<ref name="computerhistory1964"/> It was a 20-bit ], developed by Robert Norman<ref name="computerhistory-digital"/> and Frank Wanlass.<ref>{{cite journal |last1=Kilby |first1=J. S. |title=Miniaturized electronic circuits |journal=IEEE Solid-State Circuits Society Newsletter |date=2007 |volume=12 |issue=2 |pages=44–54 |doi=10.1109/N-SSC.2007.4785580 |url=https://www.researchgate.net/publication/245509003 }}</ref><ref>{{cite patent|country=US |status=Patent |number=3138743}}</ref> MOS chips further increased in complexity at a rate predicted by ], leading to chips with hundreds of ]s on a chip by the late 1960s.<ref name="ieee"/>


===Large-scale integration (LSI) {{Anchor|LSI}}=== ===Large-scale integration (LSI) {{Anchor|LSI}}===
Further development, driven by the same MOSFET scaling technology and economic factors, led to "large-scale integration" (LSI) by the mid-1970s, with tens of thousands of transistors per chip.<ref name="Hittinger">{{cite journal |last1=Hittinger |first1=William C. |title=Metal-Oxide-Semiconductor Technology |journal=Scientific American |date=1973 |volume=229 |issue=2 |pages=48–59 |issn=0036-8733|jstor=24923169 |doi=10.1038/scientificamerican0873-48 |bibcode=1973SciAm.229b..48H }}</ref> Further development, driven by the same MOSFET scaling technology and economic factors, led to "large-scale integration" (LSI) by the mid-1970s, with tens of thousands of transistors per chip.<ref name="Hittinger">{{cite journal |last1=Hittinger |first1=William C. |title=Metal-Oxide-Semiconductor Technology |journal=Scientific American |date=1973 |volume=229 |issue=2 |pages=48–59 |jstor=24923169 |doi=10.1038/scientificamerican0873-48 |bibcode=1973SciAm.229b..48H }}</ref>


The masks used to process and manufacture SSI, MSI and early LSI and VLSI devices (such as the microprocessors of the early 1970s) were mostly created by hand, often using ]-tape or similar.<ref>{{cite web |url=https://www.cnet.com/news/intels-accidental-revolution/ |title=Intel's Accidental Revolution |website=CNET}}</ref> For large or complex ICs (such as ] or ]), this was often done by specially hired professionals in charge of circuit layout, placed under the supervision of a team of engineers, who would also, along with the circuit designers, inspect and ] of each mask. The masks used to process and manufacture SSI, MSI and early LSI and VLSI devices (such as the microprocessors of the early 1970s) were mostly created by hand, often using ]-tape or similar.<ref>{{cite web |url=https://www.cnet.com/news/intels-accidental-revolution/ |title=Intel's Accidental Revolution |website=CNET|author=Kanellos, Michael |date=January 16, 2002}}</ref> For large or complex ICs (such as ] or ]), this was often done by specially hired professionals in charge of circuit layout, placed under the supervision of a team of engineers, who would also, along with the circuit designers, inspect and ] of each mask.


Integrated circuits such as 1K-bit RAMs, calculator chips, and the first microprocessors, that began to be manufactured in moderate quantities in the early 1970s, had under 4,000 transistors. True LSI circuits, approaching 10,000 transistors, began to be produced around 1974, for computer main memories and second-generation microprocessors. Integrated circuits such as 1K-bit RAMs, calculator chips, and the first microprocessors, that began to be manufactured in moderate quantities in the early 1970s, had under 4,000 transistors. True LSI circuits, approaching 10,000 transistors, began to be produced around 1974, for computer main memories and second-generation microprocessors.

Some SSI and MSI chips, like ]s, are still mass-produced, both to maintain old equipment and build new devices that require only a few gates. The ] of ] chips, for example, has become a ] and remains in production.


=== Very-large-scale integration (VLSI) === === Very-large-scale integration (VLSI) ===
{{Main|Very-large-scale integration}} {{Main|Very-large-scale integration}}
]DX2 microprocessor die]] ] microprocessor die]]


The final step in the development process, starting in the 1980s and continuing through the present, is "very-large-scale integration" (]). The development started with hundreds of thousands of transistors in the early 1980s, {{As of|2016}}, ]s continue to grow beyond ten billion transistors per chip. "Very-large-scale integration" (]) is a development started with hundreds of thousands of transistors in the early 1980s, and, as of 2023, ]s continue to grow beyond 5.3 trillion transistors per chip.


Multiple developments were required to achieve this increased density. Manufacturers moved to smaller ] design rules and ] so that they could make chips with more transistors and maintain adequate ]. The path of process improvements was summarized by the ] (ITRS), which has since been succeeded by the ] (IRDS). ] improved enough to make it practical to finish these designs in a reasonable time. The more energy-efficient ] replaced ] and ], avoiding a prohibitive increase in ]. Modern VLSI devices contain so many transistors, layers, ]s, and other features that it is no longer feasible to check the masks or do the original design by hand. Instead, engineers use {{Abbr|EDA|Electronic design automation}} tools to perform most ] work.<ref> Multiple developments were required to achieve this increased density. Manufacturers moved to smaller ] design rules and ]. The path of process improvements was summarized by the ] (ITRS), which has since been succeeded by the ] (IRDS). ] improved, making it practical to finish designs in a reasonable time. The more energy-efficient ] replaced ] and ], avoiding a prohibitive increase in ]. The complexity and density of modern VLSI devices made it no longer feasible to check the masks or do the original design by hand. Instead, engineers use {{Abbr|EDA|Electronic design automation}} tools to perform most ] work.<ref>{{cite journal|doi=10.1109/AFIPS.1968.93|year=1968|journal=Afips 1968|author=O'Donnell, C.F. |url=http://www.computer.org/csdl/proceedings/afips/1968/5072/00/50720867.pdf|title=Engineering for systems using large scale integration|page= 870}}</ref>
C.F. O'Donnell. . p. 870.</ref>


In 1986 the first one-megabit ] (RAM) chips were introduced, containing more than one million transistors. Microprocessor chips passed the million-transistor mark in 1989 and the billion-transistor mark in 2005.<ref>Peter Clarke, EE Times: ''Intel enters billion-transistor processor era'', 14 November 2005</ref> The trend continues largely unabated, with chips introduced in 2007 containing tens of billions of memory transistors.<ref>Antone Gonsalves, ''EE Times'', "Samsung begins production of 16-Gb flash", 30 April 2007</ref> In 1986, one-megabit ] (RAM) chips were introduced, containing more than one million transistors. Microprocessor chips passed the million-transistor mark in 1989, and the billion-transistor mark in 2005.<ref>{{cite web |last1=Clarke |first1=Peter |title=Intel enters billion-transistor processor era |url=https://www.eetimes.com/intel-enters-billion-transistor-processor-era/ |website=EETimes.com |access-date=May 23, 2022 |date=14 October 2005}}</ref> The trend continues largely unabated, with chips introduced in 2007 containing tens of billions of memory transistors.<ref>{{cite web |title=Samsung First to Mass Produce 16Gb NAND Flash Memory |url=https://phys.org/news/2007-04-samsung-mass-16gb-nand-memory.html |website=phys.org |access-date=May 23, 2022 |date=April 30, 2007}}</ref>


=== ULSI, WSI, SoC and 3D-IC === === ULSI, WSI, SoC and 3D-IC ===
{{See|Wafer-scale integration|System on a chip|Three-dimensional integrated circuit}} {{Further|Wafer-scale integration|System on a chip|Three-dimensional integrated circuit}}
To reflect further growth of the complexity, the term ''ULSI'' that stands for "ultra-large-scale integration" was proposed for chips of more than 1 million transistors.<ref>{{cite journal|last1=Meindl|first1=J.D.|title=Ultra-large scale integration|journal=IEEE Transactions on Electron Devices|volume=31|issue=11|pages=1555–1561|doi=10.1109/T-ED.1984.21752|year=1984|bibcode=1984ITED...31.1555M}}</ref> To reflect further growth of the complexity, the term ''ULSI'' that stands for "ultra-large-scale integration" was proposed for chips of more than 1 million transistors.<ref>{{cite journal|last1=Meindl|first1=J.D.|title=Ultra-large scale integration|journal=IEEE Transactions on Electron Devices|volume=31|issue=11|pages=1555–1561|doi=10.1109/T-ED.1984.21752|year=1984|bibcode=1984ITED...31.1555M|s2cid=19237178}}</ref>


] (WSI) is a means of building very large integrated circuits that uses an entire silicon wafer to produce a single "super-chip". Through a combination of large size and reduced packaging, WSI could lead to dramatically reduced costs for some systems, notably massively parallel supercomputers. The name is taken from the term Very-Large-Scale Integration, the current state of the art when WSI was being developed.<ref>{{cite web|last1=Shanefield|first1=Daniel|title=Wafer scale integration|url=http://www.google.com/patents/US4866501|website=google.com/patents|accessdate=21 September 2014}}</ref> ] (WSI) is a means of building very large integrated circuits that uses an entire silicon wafer to produce a single "super-chip". Through a combination of large size and reduced packaging, WSI could lead to dramatically reduced costs for some systems, notably massively parallel supercomputers. The name is taken from the term Very-Large-Scale Integration, the current state of the art when WSI was being developed.<ref>{{cite patent|pubdate=1985|inventor-last1=Shanefield|inventor-first1=Daniel|title=Wafer scale integration|status=patent|country=US|number=4866501}}</ref><ref name= wsi2022 >{{cite web | last=Edwards | first=Benj | title=Hungry for AI? New supercomputer contains 16 dinner-plate-size chips | website=Ars Technica | date=2022-11-14 | url=https://arstechnica.com/information-technology/2022/11/hungry-for-ai-new-supercomputer-contains-16-dinner-plate-size-chips/ }}</ref>


A ] (SoC or SOC) is an integrated circuit in which all the components needed for a computer or other system are included on a single chip. The design of such a device can be complex and costly, and whilst performance benefits can be had from integrating all needed components on one die, the cost of licensing and developing a one-die machine still outweigh having separate devices. With appropriate licensing, these drawbacks are offset by lower manufacturing and assembly costs and by a greatly reduced power budget: because signals among the components are kept on-die, much less power is required (see ]).<ref>{{cite web|last1=Klaas|first1=Jeff|title=System-on-a-chip|url=http://www.google.com/patents/US6816750|website=google.com/patents|accessdate=21 September 2014}}</ref> Further, signal sources and destinations are ] on die, reducing the length of wiring and therefore ], ] power costs and ] from communication between modules on the same chip. This has led to an exploration of so-called ] (NoC) devices, which apply system-on-chip design methodologies to digital communication networks as opposed to traditional ]. A ] (SoC or SOC) is an integrated circuit in which all the components needed for a computer or other system are included on a single chip. The design of such a device can be complex and costly, and whilst performance benefits can be had from integrating all needed components on one die, the cost of licensing and developing a one-die machine still outweigh having separate devices. With appropriate licensing, these drawbacks are offset by lower manufacturing and assembly costs and by a greatly reduced power budget: because signals among the components are kept on-die, much less power is required (see ]).<ref>{{cite patent|inventor-last1=Klaas|inventor-first1=Jeff|title=System-on-a-chip|pubdate=2000|status=patent|country=US|number=6816750}}</ref> Further, signal sources and destinations are ] on die, reducing the length of wiring and therefore ], ] power costs and ] from communication between modules on the same chip. This has led to an exploration of so-called ] (NoC) devices, which apply system-on-chip design methodologies to digital communication networks as opposed to traditional ].


A ] (3D-IC) has two or more layers of active electronic components that are integrated both vertically and horizontally into a single circuit. Communication between layers uses on-die signaling, so power consumption is much lower than in equivalent separate circuits. Judicious use of short vertical wires can substantially reduce overall wire length for faster operation.<ref>{{cite journal|last1=Topol|first1=A.W.|last2=Tulipe|first2=D.C.La|last3=Shi|first3=L|last4=et.|first4=al|title=Three-dimensional integrated circuits|journal=IBM Journal of Research and Development|volume=50|issue=4.5|pages=491–506|doi=10.1147/rd.504.0491|year=2006|url=https://semanticscholar.org/paper/8de20d9e01b189c02f5e68ae3720965bed48c82c}}</ref> A ] (3D-IC) has two or more layers of active electronic components that are integrated both vertically and horizontally into a single circuit. Communication between layers uses on-die signaling, so power consumption is much lower than in equivalent separate circuits. Judicious use of short vertical wires can substantially reduce overall wire length for faster operation.<ref>{{cite journal|last1=Topol|first1=A.W.|last2=Tulipe|first2=D.C.La|last3=Shi|first3=L|last4=et.|first4=al|title=Three-dimensional integrated circuits|journal=IBM Journal of Research and Development|volume=50|issue=4.5|pages=491–506|doi=10.1147/rd.504.0491|year=2006|s2cid=18432328}}</ref>


== Silicon labelling and graffiti == == Silicon labeling and graffiti ==
To allow identification during production most silicon chips will have a serial number in one corner. It is also common to add the manufacturer's logo. Ever since ICs were created, some chip designers have used the silicon surface area for surreptitious, non-functional images or words. These are sometimes referred to as ], silicon art, silicon graffiti or silicon doodling. To allow identification during production, most silicon chips will have a serial number in one corner. It is also common to add the manufacturer's logo. Ever since ICs were created, some chip designers have used the silicon surface area for surreptitious, non-functional images or words. These are sometimes referred to as ], silicon art, silicon graffiti or silicon doodling.{{citation needed|date=December 2020}}


== ICs and IC families == == ICs and IC families ==
* The ] * The ]
* The ] * The ]
* ] ] logic building blocks * ]
* ], the CMOS counterpart to the 7400 series (see also: ]) * ], the CMOS counterpart to the 7400 series (see also: ])
* ], generally regarded as the first commercially available ], which led to the famous ] CPU and then the ]'s ], ], ] etc. * ], generally regarded as the first commercially available ], which led to the 8008, the famous ] CPU, the 8086, ] (used in the original ]), and the fully-backward compatible (with the 8088/8086) ], 80386/i386, ], etc.
* The ] and ] microprocessors, used in many ]s of the early 1980s * The ] and ] microprocessors, used in many ]s of the early 1980s
* The ] series of computer-related chips, leading to the ] and ] series (used in some ] and in the 1980s Commodore ] series) * The ] series of computer-related chips, leading to the ] and ] series (the 68000 series was very successful and was used in the Apple Lisa and pre-PowerPC-based Macintosh, Commodore ], Atari ST/TT/Falcon030, and NeXT families of computers, along with many models of workstations and servers from many manufacturers in the 80s, along with many other systems and devices)
* The ] of analog integrated circuits * The ] of analog integrated circuits


== See also == == See also ==
{{Portal|Electronics|Physics|Technology|Telecommunication|Engineering|History of science|Companies|Computer programming|Telephones}}
{{Portal|Electronics}}
* ]
* ]
* ]
* ]
* ]
* ]
* ]
* ] * ]
* ] * ]
* ]
* ]
* ]
* ]
* ] * ]
* ] * ]
* ] * ]
* ] * ]
* ] * ]
* ]
* ]
* ]


== References == == References ==
Line 283: Line 298:


== Further reading == == Further reading ==
* {{cite book |last=Veendrick |first=H.J.M. |year=2017 |title=Nanometer CMOS ICs, from Basics to ASICs |publisher=Springer |isbn=978-3-319-47595-0}} * {{cite book |last=Veendrick |first=H.J.M. |year=2025 |title=Nanometer CMOS ICs, from Basics to ASICs |publisher=Springer |isbn=978-3-031-64248-7 |oclc=1463505655}}
* {{cite book |last=Baker |first=R.J. |year=2010 |title=CMOS: Circuit Design, Layout, and Simulation |edition=3rd |publisher=Wiley-IEEE |isbn=978-0-470-88132-3}} * {{cite book |last=Baker |first=R.J. |year=2010 |title=CMOS: Circuit Design, Layout, and Simulation |edition=3rd |publisher=Wiley-IEEE |isbn=978-0-470-88132-3 |oclc=699889340}}
* {{cite book |last=Marsh |first=Stephen P. |year=2006 |title=Practical MMIC design |publisher=Artech House |isbn=978-1-59693-036-0}} * {{cite book |last=Marsh |first=Stephen P. |year=2006 |title=Practical MMIC design |publisher=Artech House |isbn=978-1-59693-036-0 |oclc=1261968369}}
* {{cite book |last1=Camenzind |first1=Hans |date=2005 |title=Designing Analog Chips |publisher=Virtual Bookworm |isbn=978-1-58939-718-7 |url=http://www.designinganalogchips.com/_count/designinganalogchips.pdf |archiveurl=https://web.archive.org/web/20170612055924/http://www.designinganalogchips.com/_count/designinganalogchips.pdf |archivedate=June 12, 2017 |quote=] invented the 555 timer}} * {{cite book |last1=Camenzind |first1=Hans |date=2005 |title=Designing Analog Chips |publisher=Virtual Bookworm |isbn=978-1-58939-718-7 |oclc=926613209 |url=http://www.designinganalogchips.com/_count/designinganalogchips.pdf |archive-url=https://web.archive.org/web/20170612055924/http://www.designinganalogchips.com/_count/designinganalogchips.pdf |archive-date=12 June 2017 |quote=] invented the 555 timer}}
* {{cite book |last1=Hodges |first1=David |last2=Jackson |first2=Horace |last3=Saleh |first3=Resve |year=2003 |title=Analysis and Design of Digital Integrated Circuits |publisher=McGraw-Hill |isbn=978-0-07-228365-5}} * {{cite book |last1=Hodges |first1=David |last2=Jackson |first2=Horace |last3=Saleh |first3=Resve |year=2003 |title=Analysis and Design of Digital Integrated Circuits |publisher=McGraw-Hill |isbn=978-0-07-228365-5 |oclc=840380650}}
* {{cite book |last1=Rabaey |first1=J.M. |last2=Chandrakasan |first2=A. |last3=Nikolic |first3=B. |year=2003 |title=Digital Integrated Circuits |edition=2nd |publisher=Pearson |isbn=978-0-13-090996-1 |url=https://archive.org/details/agilesoftwaredev00robe }} * {{cite book |last1=Rabaey |first1=J.M. |last2=Chandrakasan |first2=A. |last3=Nikolic |first3=B. |year=2003 |title=Digital Integrated Circuits |edition=2nd |publisher=Pearson |isbn=978-0-13-090996-1 |oclc=893541089 |url=https://archive.org/details/agilesoftwaredev00robe }}
* {{cite book |last1=Mead |first1=Carver |last2=Conway |first2=Lynn |year=1980 |title=Introduction to VLSI systems |publisher=Addison Wesley Publishing Company |isbn=978-0-201-04358-7 |url=https://archive.org/details/introductiontovl00mead }} * {{cite book |last1=Mead |first1=Carver |last2=Conway |first2=Lynn |year=1991 |title=Introduction to VLSI systems |publisher=Addison Wesley Publishing Company |isbn=978-0-201-04358-7 |oclc=634332043 |url=https://archive.org/details/introductiontovl00mead }}


== External links == == External links ==
{{Commons|Integrated circuit}} * {{Commons category-inline|Integrated circuits}}
*

'''General'''
*
* including access to most of the datasheets for the parts. * including access to most of the datasheets for the parts.
* at ''Nobelprize.org'' *

'''Patents'''
* {{US patent|3138743|US3,138,743}} – Miniaturized electronic circuit – ]
* {{US patent|3138747|US3,138,747}} – Integrated semiconductor circuit device – R.F. Stewart
* {{US patent|3261081|US3,261,081}} – Method of making miniaturized electronic circuits – J.S. Kilby
* {{US patent|3434015|US3,434,015}} – Capacitor for miniaturized electronic circuits or the like – J. . Kilby

'''Integrated circuit die manufacturing'''
* – A gallery of IC die photographs
* – Yet another gallery of IC die photographs


{{Processor technologies}}
{{Digital systems}}
{{Digital electronics}}
{{Electronic systems}}
{{Electronic components}} {{Electronic components}}
{{Semiconductor packages}} {{Semiconductor packages}}
{{Technology topics}}
{{Computer science}} {{Computer science}}
{{Wafer bonding}}
{{MOS Interface}}
{{MOS Video/Sound}}
{{Authority control}} {{Authority control}}


] ]
] ]
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] ]

Latest revision as of 17:15, 24 December 2024

Electronic circuit formed on a small, flat piece of semiconductor material "Silicon chip" redirects here. For the electronics magazine, see Silicon Chip. "Microchip" redirects here. For other uses, see Microchip (disambiguation).

A microscope image of an integrated circuit die used to control LCDs. The pinouts are the dark circles surrounding the integrated circuit.

An integrated circuit (IC), also known as a microchip or simply chip, is a small electronic device made up of multiple interconnected electronic components such as transistors, resistors, and capacitors. These components are etched onto a small piece of semiconductor material, usually silicon. Integrated circuits are used in a wide range of electronic devices, including computers, smartphones, and televisions, to perform various functions such as processing and storing information. They have greatly impacted the field of electronics by enabling device miniaturization and enhanced functionality.

Integrated circuits are orders of magnitude smaller, faster, and less expensive than those constructed of discrete components, allowing a large transistor count.

The IC's mass production capability, reliability, and building-block approach to integrated circuit design have ensured the rapid adoption of standardized ICs in place of designs using discrete transistors. ICs are now used in virtually all electronic equipment and have revolutionized the world of electronics. Computers, mobile phones, and other home appliances are now essential parts of the structure of modern societies, made possible by the small size and low cost of ICs such as modern computer processors and microcontrollers.

Very-large-scale integration was made practical by technological advancements in semiconductor device fabrication. Since their origins in the 1960s, the size, speed, and capacity of chips have progressed enormously, driven by technical advances that fit more and more transistors on chips of the same size – a modern chip may have many billions of transistors in an area the size of a human fingernail. These advances, roughly following Moore's law, make the computer chips of today possess millions of times the capacity and thousands of times the speed of the computer chips of the early 1970s.

ICs have three main advantages over circuits constructed out of discrete components: size, cost and performance. The size and cost is low because the chips, with all their components, are printed as a unit by photolithography rather than being constructed one transistor at a time. Furthermore, packaged ICs use much less material than discrete circuits. Performance is high because the IC's components switch quickly and consume comparatively little power because of their small size and proximity. The main disadvantage of ICs is the high initial cost of designing them and the enormous capital cost of factory construction. This high initial cost means ICs are only commercially viable when high production volumes are anticipated.

Terminology

An integrated circuit is defined as:

A circuit in which all or some of the circuit elements are inseparably associated and electrically interconnected so that it is considered to be indivisible for the purposes of construction and commerce.

In strict usage, integrated circuit refers to the single-piece circuit construction originally known as a monolithic integrated circuit, which comprises a single piece of silicon. In general usage, circuits not meeting this strict definition are sometimes referred to as ICs, which are constructed using many different technologies, e.g. 3D IC, 2.5D IC, MCM, thin-film transistors, thick-film technologies, or hybrid integrated circuits. The choice of terminology frequently appears in discussions related to whether Moore's Law is obsolete.

Jack Kilby's original integrated circuit; the world's first. Made from germanium with gold-wire interconnects.

History

An early attempt at combining several components in one device (like modern ICs) was the Loewe 3NF vacuum tube first made in 1926. Unlike ICs, it was designed with the purpose of tax avoidance, as in Germany, radio receivers had a tax that was levied depending on how many tube holders a radio receiver had. It allowed radio receivers to have a single tube holder. One million were manufactured, and were "a first step in integration of radioelectronic devices". The device contained an amplifier, composed of three triodes, two capacitors and four resistors in a six-pin device. Radios with the Loewe 3NF were less expensive than other radios, showing one of the advantages of integration over using discrete components, that would be seen decades later with ICs.

Early concepts of an integrated circuit go back to 1949, when German engineer Werner Jacobi (Siemens AG) filed a patent for an integrated-circuit-like semiconductor amplifying device showing five transistors on a common substrate in a three-stage amplifier arrangement. Jacobi disclosed small and cheap hearing aids as typical industrial applications of his patent. An immediate commercial use of his patent has not been reported.

Another early proponent of the concept was Geoffrey Dummer (1909–2002), a radar scientist working for the Royal Radar Establishment of the British Ministry of Defence. Dummer presented the idea to the public at the Symposium on Progress in Quality Electronic Components in Washington, D.C., on 7 May 1952. He gave many symposia publicly to propagate his ideas and unsuccessfully attempted to build such a circuit in 1956. Between 1953 and 1957, Sidney Darlington and Yasuo Tarui (Electrotechnical Laboratory) proposed similar chip designs where several transistors could share a common active area, but there was no electrical isolation to separate them from each other.

The monolithic integrated circuit chip was enabled by the inventions of the planar process by Jean Hoerni and p–n junction isolation by Kurt Lehovec. Hoerni's invention was built on Carl Frosch and Lincoln Derick's work on surface protection and passivation by silicon dioxide masking and predeposition, as well as Fuller, Ditzenberger's and others work on the diffusion of impurities into silicon.

The first integrated circuits

Main article: Invention of the integrated circuit See also: Planar process, p–n junction isolation, and Surface passivation
Robert Noyce invented the first monolithic integrated circuit in 1959. The chip was made from silicon.

A precursor idea to the IC was to create small ceramic substrates (so-called micromodules), each containing a single miniaturized component. Components could then be integrated and wired into a bidimensional or tridimensional compact grid. This idea, which seemed very promising in 1957, was proposed to the US Army by Jack Kilby and led to the short-lived Micromodule Program (similar to 1951's Project Tinkertoy). However, as the project was gaining momentum, Kilby came up with a new, revolutionary design: the IC.

Newly employed by Texas Instruments, Kilby recorded his initial ideas concerning the integrated circuit in July 1958, successfully demonstrating the first working example of an integrated circuit on 12 September 1958. In his patent application of 6 February 1959, Kilby described his new device as "a body of semiconductor material … wherein all the components of the electronic circuit are completely integrated". The first customer for the new invention was the US Air Force. Kilby won the 2000 Nobel Prize in physics for his part in the invention of the integrated circuit.

However, Kilby's invention was not a true monolithic integrated circuit chip since it had external gold-wire connections, which would have made it difficult to mass-produce. Half a year after Kilby, Robert Noyce at Fairchild Semiconductor invented the first true monolithic IC chip. More practical than Kilby's implementation, Noyce's chip was made of silicon, whereas Kilby's was made of germanium, and Noyce's was fabricated using the planar process, developed in early 1959 by his colleague Jean Hoerni and included the critical on-chip aluminum interconnecting lines. Modern IC chips are based on Noyce's monolithic IC, rather than Kilby's.

NASA's Apollo Program was the largest single consumer of integrated circuits between 1961 and 1965.

TTL integrated circuits

Main article: Transistor–transistor logic

Transistor–transistor logic (TTL) was developed by James L. Buie in the early 1960s at TRW Inc. TTL became the dominant integrated circuit technology during the 1970s to early 1980s.

Dov Frohman, an Israeli electrical engineer who developed the EPROM in 1969-1971

Dozens of TTL integrated circuits were a standard method of construction for the processors of minicomputers and mainframe computers. Computers such as IBM 360 mainframes, PDP-11 minicomputers and the desktop Datapoint 2200 were built from bipolar integrated circuits, either TTL or the even faster emitter-coupled logic (ECL).

MOS integrated circuits

Further information: MOSFET applications § MOS integrated circuit See also: List of semiconductor scale examples, Mixed-signal integrated circuit, Moore's law, Three-dimensional integrated circuit, Transistor count, and Very Large Scale Integration

Nearly all modern IC chips are metal–oxide–semiconductor (MOS) integrated circuits, built from MOSFETs (metal–oxide–silicon field-effect transistors). The MOSFET invented at Bell Labs between 1955 and 1960, made it possible to build high-density integrated circuits. In contrast to bipolar transistors which required a number of steps for the p–n junction isolation of transistors on a chip, MOSFETs required no such steps but could be easily isolated from each other. Its advantage for integrated circuits was pointed out by Dawon Kahng in 1961. The list of IEEE milestones includes the first integrated circuit by Kilby in 1958, Hoerni's planar process and Noyce's planar IC in 1959.

The earliest experimental MOS IC to be fabricated was a 16-transistor chip built by Fred Heiman and Steven Hofstein at RCA in 1962. General Microelectronics later introduced the first commercial MOS integrated circuit in 1964, a 120-transistor shift register developed by Robert Norman. By 1964, MOS chips had reached higher transistor density and lower manufacturing costs than bipolar chips. MOS chips further increased in complexity at a rate predicted by Moore's law, leading to large-scale integration (LSI) with hundreds of transistors on a single MOS chip by the late 1960s.

Following the development of the self-aligned gate (silicon-gate) MOSFET by Robert Kerwin, Donald Klein and John Sarace at Bell Labs in 1967, the first silicon-gate MOS IC technology with self-aligned gates, the basis of all modern CMOS integrated circuits, was developed at Fairchild Semiconductor by Federico Faggin in 1968. The application of MOS LSI chips to computing was the basis for the first microprocessors, as engineers began recognizing that a complete computer processor could be contained on a single MOS LSI chip. This led to the inventions of the microprocessor and the microcontroller by the early 1970s. During the early 1970s, MOS integrated circuit technology enabled the very large-scale integration (VLSI) of more than 10,000 transistors on a single chip.

At first, MOS-based computers only made sense when high density was required, such as aerospace and pocket calculators. Computers built entirely from TTL, such as the 1970 Datapoint 2200, were much faster and more powerful than single-chip MOS microprocessors such as the 1972 Intel 8008 until the early 1980s.

Advances in IC technology, primarily smaller features and larger chips, have allowed the number of MOS transistors in an integrated circuit to double every two years, a trend known as Moore's law. Moore originally stated it would double every year, but he went on to change the claim to every two years in 1975. This increased capacity has been used to decrease cost and increase functionality. In general, as the feature size shrinks, almost every aspect of an IC's operation improves. The cost per transistor and the switching power consumption per transistor goes down, while the memory capacity and speed go up, through the relationships defined by Dennard scaling (MOSFET scaling). Because speed, capacity, and power consumption gains are apparent to the end user, there is fierce competition among the manufacturers to use finer geometries. Over the years, transistor sizes have decreased from tens of microns in the early 1970s to 10 nanometers in 2017 with a corresponding million-fold increase in transistors per unit area. As of 2016, typical chip areas range from a few square millimeters to around 600 mm, with up to 25 million transistors per mm.

The expected shrinking of feature sizes and the needed progress in related areas was forecast for many years by the International Technology Roadmap for Semiconductors (ITRS). The final ITRS was issued in 2016, and it is being replaced by the International Roadmap for Devices and Systems.

Initially, ICs were strictly electronic devices. The success of ICs has led to the integration of other technologies, in an attempt to obtain the same advantages of small size and low cost. These technologies include mechanical devices, optics, and sensors.

  • Charge-coupled devices, and the closely related active-pixel sensors, are chips that are sensitive to light. They have largely replaced photographic film in scientific, medical, and consumer applications. Billions of these devices are now produced each year for applications such as cellphones, tablets, and digital cameras. This sub-field of ICs won the Nobel Prize in 2009.
  • Very small mechanical devices driven by electricity can be integrated onto chips, a technology known as microelectromechanical systems (MEMS). These devices were developed in the late 1980s and are used in a variety of commercial and military applications. Examples include DLP projectors, inkjet printers, and accelerometers and MEMS gyroscopes used to deploy automobile airbags.
  • Since the early 2000s, the integration of optical functionality (optical computing) into silicon chips has been actively pursued in both academic research and in industry resulting in the successful commercialization of silicon based integrated optical transceivers combining optical devices (modulators, detectors, routing) with CMOS based electronics. Photonic integrated circuits that use light such as Lightelligence's PACE (Photonic Arithmetic Computing Engine) also being developed, using the emerging field of physics known as photonics.
  • Integrated circuits are also being developed for sensor applications in medical implants or other bioelectronic devices. Special sealing techniques have to be applied in such biogenic environments to avoid corrosion or biodegradation of the exposed semiconductor materials.

As of 2018, the vast majority of all transistors are MOSFETs fabricated in a single layer on one side of a chip of silicon in a flat two-dimensional planar process. Researchers have produced prototypes of several promising alternatives, such as:

As it becomes more difficult to manufacture ever smaller transistors, companies are using multi-chip modules/chiplets, three-dimensional integrated circuits, package on package, High Bandwidth Memory and through-silicon vias with die stacking to increase performance and reduce size, without having to reduce the size of the transistors. Such techniques are collectively known as advanced packaging. Advanced packaging is mainly divided into 2.5D and 3D packaging. 2.5D describes approaches such as multi-chip modules while 3D describes approaches where dies are stacked in one way or another, such as package on package and high bandwidth memory. All approaches involve 2 or more dies in a single package. Alternatively, approaches such as 3D NAND stack multiple layers on a single die. A technique has been demonstrated to include microfluidic cooling on integrated circuits, to improve cooling performance as well as peltier thermoelectric coolers on solder bumps, or thermal solder bumps used exclusively for heat dissipation, used in flip-chip.

Design

Main articles: Electronic design automation, Hardware description language, and Integrated circuit design
Virtual detail of an integrated circuit through four layers of planarized copper interconnect, down to the polysilicon (pink), wells (greyish), and substrate (green)

The cost of designing and developing a complex integrated circuit is quite high, normally in the multiple tens of millions of dollars. Therefore, it only makes economic sense to produce integrated circuit products with high production volume, so the non-recurring engineering (NRE) costs are spread across typically millions of production units.

Modern semiconductor chips have billions of components, and are far too complex to be designed by hand. Software tools to help the designer are essential. Electronic design automation (EDA), also referred to as electronic computer-aided design (ECAD), is a category of software tools for designing electronic systems, including integrated circuits. The tools work together in a design flow that engineers use to design, verify, and analyze entire semiconductor chips. Some of the latest EDA tools use artificial intelligence (AI) to help engineers save time and improve chip performance.

Types

A-to-D converter IC in a DIP

Integrated circuits can be broadly classified into analog, digital and mixed signal, consisting of analog and digital signaling on the same IC.

Digital integrated circuits can contain billions of logic gates, flip-flops, multiplexers, and other circuits in a few square millimeters. The small size of these circuits allows high speed, low power dissipation, and reduced manufacturing cost compared with board-level integration. These digital ICs, typically microprocessors, DSPs, and microcontrollers, use boolean algebra to process "one" and "zero" signals.

The die from an Intel 8742, an 8-bit NMOS microcontroller that includes a CPU running at 12 MHz, 128 bytes of RAM, 2048 bytes of EPROM, and I/O in the same chip

Among the most advanced integrated circuits are the microprocessors or "cores", used in personal computers, cell-phones, etc. Several cores may be integrated together in a single IC or chip. Digital memory chips and application-specific integrated circuits (ASICs) are examples of other families of integrated circuits.

In the 1980s, programmable logic devices were developed. These devices contain circuits whose logical function and connectivity can be programmed by the user, rather than being fixed by the integrated circuit manufacturer. This allows a chip to be programmed to do various LSI-type functions such as logic gates, adders and registers. Programmability comes in various forms – devices that can be programmed only once, devices that can be erased and then re-programmed using UV light, devices that can be (re)programmed using flash memory, and field-programmable gate arrays (FPGAs) which can be programmed at any time, including during operation. Current FPGAs can (as of 2016) implement the equivalent of millions of gates and operate at frequencies up to 1 GHz.

Analog ICs, such as sensors, power management circuits, and operational amplifiers (op-amps), process continuous signals, and perform analog functions such as amplification, active filtering, demodulation, and mixing.

ICs can combine analog and digital circuits on a chip to create functions such as analog-to-digital converters and digital-to-analog converters. Such mixed-signal circuits offer smaller size and lower cost, but must account for signal interference. Prior to the late 1990s, radios could not be fabricated in the same low-cost CMOS processes as microprocessors. But since 1998, radio chips have been developed using RF CMOS processes. Examples include Intel's DECT cordless phone, or 802.11 (Wi-Fi) chips created by Atheros and other companies.

Modern electronic component distributors often further sub-categorize integrated circuits:

Manufacturing

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Fabrication

Main article: Semiconductor fabrication
Rendering of a small standard cell with three metal layers (dielectric has been removed). The sand-colored structures are metal interconnect, with the vertical pillars being contacts, typically plugs of tungsten. The reddish structures are polysilicon gates, and the solid at the bottom is the crystalline silicon bulk.
Schematic structure of a CMOS chip, as built in the early 2000s. The graphic shows LDD-MISFET's on an SOI substrate with five metallization layers and solder bump for flip-chip bonding. It also shows the section for FEOL (front-end of line), BEOL (back-end of line) and first parts of back-end process.

The semiconductors of the periodic table of the chemical elements were identified as the most likely materials for a solid-state vacuum tube. Starting with copper oxide, proceeding to germanium, then silicon, the materials were systematically studied in the 1940s and 1950s. Today, monocrystalline silicon is the main substrate used for ICs although some III-V compounds of the periodic table such as gallium arsenide are used for specialized applications like LEDs, lasers, solar cells and the highest-speed integrated circuits. It took decades to perfect methods of creating crystals with minimal defects in semiconducting materials' crystal structure.

Semiconductor ICs are fabricated in a planar process which includes three key process steps – photolithography, deposition (such as chemical vapor deposition), and etching. The main process steps are supplemented by doping and cleaning. More recent or high-performance ICs may instead use multi-gate FinFET or GAAFET transistors instead of planar ones, starting at the 22 nm node (Intel) or 16/14 nm nodes.

Mono-crystal silicon wafers are used in most applications (or for special applications, other semiconductors such as gallium arsenide are used). The wafer need not be entirely silicon. Photolithography is used to mark different areas of the substrate to be doped or to have polysilicon, insulators or metal (typically aluminium or copper) tracks deposited on them. Dopants are impurities intentionally introduced to a semiconductor to modulate its electronic properties. Doping is the process of adding dopants to a semiconductor material.

  • Integrated circuits are composed of many overlapping layers, each defined by photolithography, and normally shown in different colors. Some layers mark where various dopants are diffused into the substrate (called diffusion layers), some define where additional ions are implanted (implant layers), some define the conductors (doped polysilicon or metal layers), and some define the connections between the conducting layers (via or contact layers). All components are constructed from a specific combination of these layers.
  • In a self-aligned CMOS process, a transistor is formed wherever the gate layer (polysilicon or metal) crosses a diffusion layer (this is called "the self-aligned gate").
  • Capacitive structures, in form very much like the parallel conducting plates of a traditional electrical capacitor, are formed according to the area of the "plates", with insulating material between the plates. Capacitors of a wide range of sizes are common on ICs.
  • Meandering stripes of varying lengths are sometimes used to form on-chip resistors, though most logic circuits do not need any resistors. The ratio of the length of the resistive structure to its width, combined with its sheet resistivity, determines the resistance.
  • More rarely, inductive structures can be built as tiny on-chip coils, or simulated by gyrators.

Since a CMOS device only draws current on the transition between logic states, CMOS devices consume much less current than bipolar junction transistor devices.

A random-access memory is the most regular type of integrated circuit; the highest density devices are thus memories; but even a microprocessor will have memory on the chip. (See the regular array structure at the bottom of the first image.) Although the structures are intricate – with widths which have been shrinking for decades – the layers remain much thinner than the device widths. The layers of material are fabricated much like a photographic process, although light waves in the visible spectrum cannot be used to "expose" a layer of material, as they would be too large for the features. Thus photons of higher frequencies (typically ultraviolet) are used to create the patterns for each layer. Because each feature is so small, electron microscopes are essential tools for a process engineer who might be debugging a fabrication process.

Each device is tested before packaging using automated test equipment (ATE), in a process known as wafer testing, or wafer probing. The wafer is then cut into rectangular blocks, each of which is called a die. Each good die (plural dice, dies, or die) is then connected into a package using aluminium (or gold) bond wires which are thermosonically bonded to pads, usually found around the edge of the die. Thermosonic bonding was first introduced by A. Coucoulas which provided a reliable means of forming these vital electrical connections to the outside world. After packaging, the devices go through final testing on the same or similar ATE used during wafer probing. Industrial CT scanning can also be used. Test cost can account for over 25% of the cost of fabrication on lower-cost products, but can be negligible on low-yielding, larger, or higher-cost devices.

As of 2022, a fabrication facility (commonly known as a semiconductor fab) can cost over US$12 billion to construct. The cost of a fabrication facility rises over time because of increased complexity of new products; this is known as Rock's law. Such a facility features:

ICs can be manufactured either in-house by integrated device manufacturers (IDMs) or using the foundry model. IDMs are vertically integrated companies (like Intel and Samsung) that design, manufacture and sell their own ICs, and may offer design and/or manufacturing (foundry) services to other companies (the latter often to fabless companies). In the foundry model, fabless companies (like Nvidia) only design and sell ICs and outsource all manufacturing to pure play foundries such as TSMC. These foundries may offer IC design services.

Packaging

Main article: Integrated circuit packaging
A Soviet MSI nMOS chip made in 1977, part of a four-chip calculator set designed in 1970

The earliest integrated circuits were packaged in ceramic flat packs, which continued to be used by the military for their reliability and small size for many years. Commercial circuit packaging quickly moved to the dual in-line package (DIP), first in ceramic and later in plastic, which is commonly cresol-formaldehyde-novolac. In the 1980s pin counts of VLSI circuits exceeded the practical limit for DIP packaging, leading to pin grid array (PGA) and leadless chip carrier (LCC) packages. Surface mount packaging appeared in the early 1980s and became popular in the late 1980s, using finer lead pitch with leads formed as either gull-wing or J-lead, as exemplified by the small-outline integrated circuit (SOIC) package – a carrier which occupies an area about 30–50% less than an equivalent DIP and is typically 70% thinner. This package has "gull wing" leads protruding from the two long sides and a lead spacing of 0.050 inches.

In the late 1990s, plastic quad flat pack (PQFP) and thin small-outline package (TSOP) packages became the most common for high pin count devices, though PGA packages are still used for high-end microprocessors.

Ball grid array (BGA) packages have existed since the 1970s. Flip-chip Ball Grid Array packages, which allow for a much higher pin count than other package types, were developed in the 1990s. In an FCBGA package, the die is mounted upside-down (flipped) and connects to the package balls via a package substrate that is similar to a printed-circuit board rather than by wires. FCBGA packages allow an array of input-output signals (called Area-I/O) to be distributed over the entire die rather than being confined to the die periphery. BGA devices have the advantage of not needing a dedicated socket but are much harder to replace in case of device failure.

Intel transitioned away from PGA to land grid array (LGA) and BGA beginning in 2004, with the last PGA socket released in 2014 for mobile platforms. As of 2018, AMD uses PGA packages on mainstream desktop processors, BGA packages on mobile processors, and high-end desktop and server microprocessors use LGA packages.

Electrical signals leaving the die must pass through the material electrically connecting the die to the package, through the conductive traces (paths) in the package, through the leads connecting the package to the conductive traces on the printed circuit board. The materials and structures used in the path these electrical signals must travel have very different electrical properties, compared to those that travel to different parts of the same die. As a result, they require special design techniques to ensure the signals are not corrupted, and much more electric power than signals confined to the die itself.

When multiple dies are put in one package, the result is a system in package, abbreviated SiP. A multi-chip module (MCM), is created by combining multiple dies on a small substrate often made of ceramic. The distinction between a large MCM and a small printed circuit board is sometimes fuzzy.

Packaged integrated circuits are usually large enough to include identifying information. Four common sections are the manufacturer's name or logo, the part number, a part production batch number and serial number, and a four-digit date-code to identify when the chip was manufactured. Extremely small surface-mount technology parts often bear only a number used in a manufacturer's lookup table to find the integrated circuit's characteristics.

The manufacturing date is commonly represented as a two-digit year followed by a two-digit week code, such that a part bearing the code 8341 was manufactured in week 41 of 1983, or approximately in October 1983.

Intellectual property

Main article: Integrated circuit layout design protection

The possibility of copying by photographing each layer of an integrated circuit and preparing photomasks for its production on the basis of the photographs obtained is a reason for the introduction of legislation for the protection of layout designs. The US Semiconductor Chip Protection Act of 1984 established intellectual property protection for photomasks used to produce integrated circuits.

A diplomatic conference held at Washington, D.C., in 1989 adopted a Treaty on Intellectual Property in Respect of Integrated Circuits, also called the Washington Treaty or IPIC Treaty. The treaty is currently not in force, but was partially integrated into the TRIPS agreement.

There are several United States patents connected to the integrated circuit, which include patents by J.S. Kilby US3,138,743, US3,261,081, US3,434,015 and by R.F. Stewart US3,138,747.

National laws protecting IC layout designs have been adopted in a number of countries, including Japan, the EC, the UK, Australia, and Korea. The UK enacted the Copyright, Designs and Patents Act, 1988, c. 48, § 213, after it initially took the position that its copyright law fully protected chip topographies. See British Leyland Motor Corp. v. Armstrong Patents Co.

Criticisms of inadequacy of the UK copyright approach as perceived by the US chip industry are summarized in further chip rights developments.

Australia passed the Circuit Layouts Act of 1989 as a sui generis form of chip protection. Korea passed the Act Concerning the Layout-Design of Semiconductor Integrated Circuits in 1992.

Generations

See also: List of semiconductor scale examples, MOS integrated circuit, and Transistor count

In the early days of simple integrated circuits, the technology's large scale limited each chip to only a few transistors, and the low degree of integration meant the design process was relatively simple. Manufacturing yields were also quite low by today's standards. As metal–oxide–semiconductor (MOS) technology progressed, millions and then billions of MOS transistors could be placed on one chip, and good designs required thorough planning, giving rise to the field of electronic design automation, or EDA. Some SSI and MSI chips, like discrete transistors, are still mass-produced, both to maintain old equipment and build new devices that require only a few gates. The 7400 series of TTL chips, for example, has become a de facto standard and remains in production.

Acronym Name Year Transistor count Logic gates number
SSI small-scale integration 1964 1 to 10 1 to 12
MSI medium-scale integration 1968 10 to 500 13 to 99
LSI large-scale integration 1971 500 to 20 000 100 to 9999
VLSI very large-scale integration 1980 20 000 to 1 000 000 10 000 to 99 999
ULSI ultra-large-scale integration 1984 1 000 000 and more 100 000 and more

Small-scale integration (SSI)

The first integrated circuits contained only a few transistors. Early digital circuits containing tens of transistors provided a few logic gates, and early linear ICs such as the Plessey SL201 or the Philips TAA320 had as few as two transistors. The number of transistors in an integrated circuit has increased dramatically since then. The term "large scale integration" (LSI) was first used by IBM scientist Rolf Landauer when describing the theoretical concept; that term gave rise to the terms "small-scale integration" (SSI), "medium-scale integration" (MSI), "very-large-scale integration" (VLSI), and "ultra-large-scale integration" (ULSI). The early integrated circuits were SSI.

SSI circuits were crucial to early aerospace projects, and aerospace projects helped inspire development of the technology. Both the Minuteman missile and Apollo program needed lightweight digital computers for their inertial guidance systems. Although the Apollo Guidance Computer led and motivated integrated-circuit technology, it was the Minuteman missile that forced it into mass-production. The Minuteman missile program and various other United States Navy programs accounted for the total $4 million integrated circuit market in 1962, and by 1968, U.S. Government spending on space and defense still accounted for 37% of the $312 million total production.

The demand by the U.S. Government supported the nascent integrated circuit market until costs fell enough to allow IC firms to penetrate the industrial market and eventually the consumer market. The average price per integrated circuit dropped from $50 in 1962 to $2.33 in 1968. Integrated circuits began to appear in consumer products by the turn of the 1970s decade. A typical application was FM inter-carrier sound processing in television receivers.

The first application MOS chips were small-scale integration (SSI) chips. Following Mohamed M. Atalla's proposal of the MOS integrated circuit chip in 1960, the earliest experimental MOS chip to be fabricated was a 16-transistor chip built by Fred Heiman and Steven Hofstein at RCA in 1962. The first practical application of MOS SSI chips was for NASA satellites.

Medium-scale integration (MSI)

The next step in the development of integrated circuits introduced devices which contained hundreds of transistors on each chip, called "medium-scale integration" (MSI).

MOSFET scaling technology made it possible to build high-density chips. By 1964, MOS chips had reached higher transistor density and lower manufacturing costs than bipolar chips.

In 1964, Frank Wanlass demonstrated a single-chip 16-bit shift register he designed, with a then-incredible 120 MOS transistors on a single chip. The same year, General Microelectronics introduced the first commercial MOS integrated circuit chip, consisting of 120 p-channel MOS transistors. It was a 20-bit shift register, developed by Robert Norman and Frank Wanlass. MOS chips further increased in complexity at a rate predicted by Moore's law, leading to chips with hundreds of MOSFETs on a chip by the late 1960s.

Large-scale integration (LSI)

Further development, driven by the same MOSFET scaling technology and economic factors, led to "large-scale integration" (LSI) by the mid-1970s, with tens of thousands of transistors per chip.

The masks used to process and manufacture SSI, MSI and early LSI and VLSI devices (such as the microprocessors of the early 1970s) were mostly created by hand, often using Rubylith-tape or similar. For large or complex ICs (such as memories or processors), this was often done by specially hired professionals in charge of circuit layout, placed under the supervision of a team of engineers, who would also, along with the circuit designers, inspect and verify the correctness and completeness of each mask.

Integrated circuits such as 1K-bit RAMs, calculator chips, and the first microprocessors, that began to be manufactured in moderate quantities in the early 1970s, had under 4,000 transistors. True LSI circuits, approaching 10,000 transistors, began to be produced around 1974, for computer main memories and second-generation microprocessors.

Very-large-scale integration (VLSI)

Main article: Very-large-scale integration
Upper interconnect layers on an Intel 80486DX2 microprocessor die

"Very-large-scale integration" (VLSI) is a development started with hundreds of thousands of transistors in the early 1980s, and, as of 2023, transistor counts continue to grow beyond 5.3 trillion transistors per chip.

Multiple developments were required to achieve this increased density. Manufacturers moved to smaller MOSFET design rules and cleaner fabrication facilities. The path of process improvements was summarized by the International Technology Roadmap for Semiconductors (ITRS), which has since been succeeded by the International Roadmap for Devices and Systems (IRDS). Electronic design tools improved, making it practical to finish designs in a reasonable time. The more energy-efficient CMOS replaced NMOS and PMOS, avoiding a prohibitive increase in power consumption. The complexity and density of modern VLSI devices made it no longer feasible to check the masks or do the original design by hand. Instead, engineers use EDA tools to perform most functional verification work.

In 1986, one-megabit random-access memory (RAM) chips were introduced, containing more than one million transistors. Microprocessor chips passed the million-transistor mark in 1989, and the billion-transistor mark in 2005. The trend continues largely unabated, with chips introduced in 2007 containing tens of billions of memory transistors.

ULSI, WSI, SoC and 3D-IC

Further information: Wafer-scale integration, System on a chip, and Three-dimensional integrated circuit

To reflect further growth of the complexity, the term ULSI that stands for "ultra-large-scale integration" was proposed for chips of more than 1 million transistors.

Wafer-scale integration (WSI) is a means of building very large integrated circuits that uses an entire silicon wafer to produce a single "super-chip". Through a combination of large size and reduced packaging, WSI could lead to dramatically reduced costs for some systems, notably massively parallel supercomputers. The name is taken from the term Very-Large-Scale Integration, the current state of the art when WSI was being developed.

A system-on-a-chip (SoC or SOC) is an integrated circuit in which all the components needed for a computer or other system are included on a single chip. The design of such a device can be complex and costly, and whilst performance benefits can be had from integrating all needed components on one die, the cost of licensing and developing a one-die machine still outweigh having separate devices. With appropriate licensing, these drawbacks are offset by lower manufacturing and assembly costs and by a greatly reduced power budget: because signals among the components are kept on-die, much less power is required (see Packaging). Further, signal sources and destinations are physically closer on die, reducing the length of wiring and therefore latency, transmission power costs and waste heat from communication between modules on the same chip. This has led to an exploration of so-called Network-on-Chip (NoC) devices, which apply system-on-chip design methodologies to digital communication networks as opposed to traditional bus architectures.

A three-dimensional integrated circuit (3D-IC) has two or more layers of active electronic components that are integrated both vertically and horizontally into a single circuit. Communication between layers uses on-die signaling, so power consumption is much lower than in equivalent separate circuits. Judicious use of short vertical wires can substantially reduce overall wire length for faster operation.

Silicon labeling and graffiti

To allow identification during production, most silicon chips will have a serial number in one corner. It is also common to add the manufacturer's logo. Ever since ICs were created, some chip designers have used the silicon surface area for surreptitious, non-functional images or words. These are sometimes referred to as chip art, silicon art, silicon graffiti or silicon doodling.

ICs and IC families

See also

References

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Chemical
Electromagnetism
Electricity
Computer
Perspectives
Criticism
Ecotechnology
Policy & politics
Progressivism
Studies
Related concepts
Applied science
Innovation
Computer science
Note: This template roughly follows the 2012 ACM Computing Classification System.
Hardware
Computer systems organization
Networks
Software organization
Software notations and tools
Software development
Theory of computation
Algorithms
Mathematics of computing
Information systems
Security
Human–computer interaction
Concurrency
Artificial intelligence
Machine learning
Graphics
Applied computing
Wafer bonding techniques used in ICs, MEMS, and NEMS
Substrate bonding
Connections
See also
Interface chips from MOS Technology and second source/clone vendors
Video/sound chips from MOS Technology and second source/clone vendors
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