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"offset within page" does not come from the page-table entry

The phrase should surely be . — Preceding unsigned comment added by 83.218.4.174 (talk) 23:56, 12 October 2016 (UTC)

You are of course correct - and nice catch, that's been on the page for a long time. You can of course make the change yourself if you want. Be WP:BOLD ! Jeh (talk) 03:08, 13 October 2016 (UTC)

Great, I agree with you, not "from the linear virtual address...", but from the linear address. We could keep differentiating simplify linear addressing from virtual address, because the latter could also used to represents the former. — Preceding unsigned comment added by Paex86 (talk • contribs) 00:44, 15 October 2016 (UTC)

" they defined an enhanced version of PAE", How Can We Interpret this "Enhanced Version"?

Misplaced Pages.org always have a lot of invented words by a lot of so called famous professionals. Maybe those are the prominent features of wiki articles. We read, we learn and we appreciate all the motivations around them all.

Paging scheme, which AMD64 architecture adopted, is similar with the scheme using in the PAE, and also further extended into an additional paging level. So this "enhanced", we could see at this point. But is it an enhanced version of PAE? In order to answer this question, we have to take a deeper look at what PAE really is!

PAE is short for Physical Address(ing) Extension, from 16-bit to 32-bit, we call it an expansion. But from 32-bit towards 36-bit and even more, we could only call it an extension. For this extension, we could ensure that the extended part is not easy to touch, in other words, the map between 32-bit and 36-bit is not easily and directly one-to-one mapped, but further taking advantage of paging capability. So PAE, is not only an extension of Physical Address, but also an extension of paging found in Intel 80386.

Now we have to take a look at paging in AMD64, this is a partial-to-partial paging schema, 48-bit linear address towards to up to 48-bit physical address. Obviously, there is no extension, so paging in AMD64 is not an PAE enabled, but just like another version of paging found in 80386, designed for 64-bit computing. Without changing the current scheme, it is hard to page 48-bit or more linear address to physical address larger than what 48-bit address could represent. This ensures the presumption that there is no extension at all once again.

So "They defined an enhanced version of PAE" is logically wrong. We could make a little bit correction towards it, i.e. they defined an enhanced version of paging scheme found in PAE. That would be much better. — Preceding unsigned comment added by Paex86 (talk • contribs) 00:34, 15 October 2016 (UTC)

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