The following pages link to Abstract machine
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- Coprocessor (links | edit)
- Index register (links | edit)
- Hazard (computer architecture) (links | edit)
- Semantics (computer science) (links | edit)
- Time complexity (links | edit)
- Classic RISC pipeline (links | edit)
- Branch predictor (links | edit)
- Timeline of algorithms (links | edit)
- Execution (computing) (links | edit)
- Abstract computer (redirect page) (links | edit)
- Adder (electronics) (links | edit)
- Register renaming (links | edit)
- Prefetch input queue (links | edit)
- Computability (links | edit)
- Generative grammar (links | edit)
- Von Neumann architecture (links | edit)
- Processor register (links | edit)
- DEC PRISM (links | edit)
- Complexity class (links | edit)
- Register machine (links | edit)
- 4-bit computing (links | edit)
- Translation lookaside buffer (links | edit)
- Random-access machine (links | edit)
- Tree-adjoining grammar (links | edit)
- Instruction cycle (links | edit)
- Deterministic finite automaton (links | edit)
- Nondeterministic finite automaton (links | edit)
- NX bit (links | edit)
- Peter Landin (links | edit)
- Deterministic algorithm (links | edit)
- Lispkit Lisp (links | edit)
- Explicitly parallel instruction computing (links | edit)
- Addressing mode (links | edit)
- CPU cache (links | edit)
- CORDIC (links | edit)
- Temporal multithreading (links | edit)
- 36-bit computing (links | edit)
- Parallel RAM (links | edit)
- Multiple instruction, single data (links | edit)
- Out-of-order execution (links | edit)
- Finite-state transducer (links | edit)
- Kuroda normal form (links | edit)
- Single instruction, single data (links | edit)
- Terry Sejnowski (links | edit)
- Memory buffer register (links | edit)
- Intermediate representation (links | edit)
- Descriptive complexity theory (links | edit)
- General-purpose computing on graphics processing units (links | edit)
- Orthogonal instruction set (links | edit)