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In computing, Physical Address Extension (PAE) is a feature to allow 32-bit IA-32 central processing units (CPUs) to access a physical address space (including random access memory and memory mapped devices) larger than 4 gigabytes.

PAE was first implemented in the Intel Pentium Pro in 1995, although the accompanying chipsets usually lacked support for the required extra address bits. It was extended by AMD to add a level to the page table hierarchy, to allow it to handle up to 52-bit physical addresses, add NX bit functionality, and make it the mandatory memory paging model in long mode. PAE is supported by Intel Pentium Pro and later Pentium-series processors except most 400 MHz-bus versions of the Pentium M. It is also available on AMD processors starting with the AMD64 architecture. (Previous AMD Athlon processors, including the Barton, did not support it.)

Design

With PAE, IA-32 architecture is augmented with additional address lines used to select the additional memory, so physical address size increases from 32 bits to 36 bits. This increases the physical memory addressable by the system from 4 GB to 64 GB. The 32-bit size of the virtual address is not changed, so regular application software continues to use instructions with 32-bit addresses and (in a flat memory model) is limited to 4 gigabytes of virtual address space. Operating systems supporting this mode use page tables to map the regular 4 GB address space into the physical memory, which depending on the operating system may be as big as 64 GB. The mapping is typically applied separately for each process, so that the extra memory is useful even though no single regular application can access it all simultaneously.

Later work associated with AMD's development of x86-64 architecture expanded the theoretical possible size of physical addresses to 52 bits.

Page table structures

In protected mode, x86 processors use a two-level page translation scheme, where the control register CR3 points to a single 4 KB long page directory divided into 1024 × 4 byte entries that point to 4 KB long page tables, similarly consisting of 1024 × 4 byte entries pointing to 4 KB long pages.

Enabling PAE (by setting bit 5, PAE, of the system register CR4) causes major changes to this scheme. By default, the size of each page remains as 4 KB. Each entry in the page table and page directory becomes 64 bit long (8 bytes), instead of 32 bits, to allow for additional address bits. However, the size of tables does not change, so both table and directory now have only 512 entries. Because this allows only one quarter of the entries of the original scheme, an extra level of hierarchy has been added, so CR3 now points to Page Directory Pointer Table, a short table containing four pointers to page directories.

The entries in the page directory have an additional flag in bit 7, named PS (for page size). If the system has set this bit to 1, the page directory entry does not point to a page table but to a single, large 2 MB page (Page Size Extension).

In all page table formats supported by x86 and x86-64, the 12 least significant bits of the page table entry are either interpreted by the memory management unit or are reserved for operating system use. In processors that implement the "no-execute" or "execution diable" feature, the most significant bit (bit 63) is the NX bit. The next eleven most significant bits (bits 52 through 62) are reserved for operating system use by both Intel and AMD's architecture specifications. Thus, from 64 bits in the page table entry, 12 low-order and 12 high-order bits have other uses, leaving 40 bits (bits 12 though 51) for the physical page number. Combined with 12 bits of "offset within page" from the page table entry, a maximum of 52 bits are available to address physical memory. This allows a maximum RAM configuration of 2 bytes, or 4 petabytes (about 4.5×10 bytes).

On x86-64 processors in native long mode, the address translation scheme uses PAE but adds a fourth table, the 512-entry page-map level 4 table, and extends the page directory pointer table to 512 entries instead of the original 4 entries it has in protected mode. Currently 48 bits of virtual page number are translated, giving a virtual address space of up to 256 TB. In the page table entries, in the original specification, 40 bits of physical page number are implemented.

• Page table structures
• No PAE, 4 KB pages
• No PAE, 4 MB pages
• With PAE; 4 KB pages
• With PAE; 2 MB pages

Support

Software can identify via the CPUID flag PAE whether a CPU supports PAE mode or not. A free-of-charge program for Microsoft Windows is available which will list many processor capabilities, including PAE support. In Linux, commands such as cat /proc/cpuinfo can list the pae flag when present, as well as other tools such as the SYSLINUX Hardware Detection Tool.

To use PAE, motherboard and operating system support is required.

Operating system support

Microsoft Windows

Microsoft Windows supports PAE if booted with the appropriate option, but according to Geoff Chappell, Microsoft limits 32-bit versions of Windows to 4 GB as a matter of its licensing policy. Microsoft Technical Fellow Mark Russinovich says that some drivers were found to be unstable when encountering physical addresses above 4 GB.

The following table shows the hard memory limits for IA-32-based versions of Microsoft Windows, with PAE enabled:

The original releases of Windows XP and Windows XP SP1 used PAE mode to allow RAM to extend beyond the 4 GB address limit. However, it led to compatibility problems with 3rd party drivers which led Microsoft to remove this capability in Windows XP Service Pack 2. Windows XP SP2 and later, by default, on processors with the no-execute (NX) or execute-disable (XD) feature, runs in PAE mode in order to allow NX. The no execute (NX, or XD for execution disable) bit resides in bit 63 of the page table entry and, without PAE, page table entries on 32-bit systems have only 32 bits; therefore PAE mode is required in order to exploit the NX feature. However, "client" versions of 32-bit Windows (Windows XP SP2 and later, Windows Vista, Windows 7) limit physical address space to the first 4 GB for driver compatibility via the licensing limitation mechanism, even though these versions do run in PAE mode if NX support is enabled.

Windows 8 will only run on processors which support PAE, in addition to NX and SSE2.

OS X

Intel versions of OS X support PAE. Versions 10.4.4 through 10.5.8 of Mac OS X run on both x86 and PowerPC processors. Version 10.6 and 10.7 version of OS X only run on x86 processors. So far, all x86 Macs have used Intel (not AMD) CPUs. OS X versions that are compatible with x86 fully support PAE and the NX bit on all Intel Macs. Mac Pro and Xserve systems can use up to 64 GB of RAM. The Mac OS X 10.5 (Leopard) kernel remains 32-bit. Mac OS X 10.6 (Snow Leopard) can be booted into a 64-bit version of the kernel on certain systems; Mac OS X 10.7 (Lion) and OS X 10.8 (Mountain Lion) ship with a 64-bit enabled kernel by default.

Linux

The Linux kernel includes full PAE mode support starting with version 2.3.23, with Linus Torvalds mentioning PAE's 4 MB page support in 1.3.15, enabling access of up to 64 GB of memory on 32-bit machines. A PAE-enabled Linux kernel requires that the CPU also support PAE. The Linux kernel supports PAE as a build option and major distributions provide a PAE kernel either as the default or as an option. As of 2009, some common Linux distributions have started to use a PAE-enabled kernel as the distribution-specific default. As of 2012, common Linux distributions have stopped distributing non-PAE kernels, thus making PAE hardware mandatory - examples being Red Hat Enterprise Linux / CentOS from version 6.0, Ubuntu (and derivatives like Linux Mint) from 12.10. Fedora distributed both PAE and non-PAE kernels up to version 19, and Debian still does.

NX bit feature will not work if the kernel was built without PAE support.

Others

• FreeBSD and NetBSD also support PAE as a kernel build option. FreeBSD supports PAE in the 4.x series starting with 4.9, in the 5.x series starting with 5.1, and in all 6.x and later releases. Support requires the kernel PAE configuration-option. Loadable kernel modules can only be loaded into a kernel with PAE enabled if the modules were built with PAE enabled; the binary modules in FreeBSD distributions are not built with PAE enabled, and thus cannot be loaded into PAE kernels. Not all drivers support more than 4 GB of physical memory; those drivers won't work correctly on a system with PAE.

• Solaris supports PAE beginning with Solaris version 7. However, third-party drivers used with version 7 which do not specifically include PAE support may operate erratically or fail outright on a system with PAE.

• Haiku added initial support for PAE sometime after the R1 Alpha 2 release. With the release of R1 Alpha 3 PAE is now officially supported.

See also

• Page Size Extension
  • PSE-36
• Architecture of Windows NT
• 3 GB barrier
• ARM Cortex-A15 MPCore — with Large Physical Address Extensions (LPAE)

References

1. T. Shanley (1998). Pentium Pro and Pentium II System Architecture. Addison-Wesley Professional. p. 439. ISBN 978-0-201-30973-7.
2. Operating Systems and PAE Support
3. "AMD64 Architecture Programmer's Manual Volume 2: System Programming" (PDF). AMD64 Architecture Programmer's Manual. Advanced Micro Devices. November 1, 2009. pp. 124–143. Retrieved February 3, 2010. Long-mode page translation requires the use of physical-address extensions (PAE). Before activating long mode, PAE must be enabled by setting CR4.PAE to 1. Activating long mode before enabling PAE causes a general-protection exception (#GP) to occur.
4. AMD Athlon 64 3200+ - Benefits of a 64bit architecture
5. AMD Corporation (May 2011). "Volume 2: System Programming" (pdf). AMD64 Architecture Programmer's Manual. AMD Corporation. Retrieved 2011-10-29.
6. Microsoft Sysinternals: Coreinfo
7. "Detecting your Hardware". Gentoo. October 8, 2008. Retrieved 2013-04-28.
8. ^ http://www.geoffchappell.com/notes/windows/license/memory.htm
9. ^ Mark Russinovich (2008-07-21). "Pushing the Limits of Windows: Physical Memory". Retrieved 2010-07-11.
10. "Memory Limits for Windows releases". MSDN. Microsoft. December 5, 2007. Retrieved 2007-12-10.
11. "Intel Physical Addressing Extensions (PAE) in Windows 2000". Support. Microsoft. October 26, 2007. Retrieved 2007-12-29.
12. "Overview of Windows Server 2003 R2 Datacenter Edition". TechNet. Microsoft. Retrieved 2009-05-15.
13. "The RAM reported by the System Properties dialog box and the System Information tool is less than you expect in Windows Vista or in Windows XP Service Pack 2 or later version (MSKB 888137)". Knowledge Base. Microsoft. Retrieved 2009-01-30.
14. How To Check If Your Processor Supports PAE, NX And SSE2 For Windows 8 Installation
15. "Road to Mac OS X 10.6 Snow Leopard: 64-Bits". 2008-09-26. Retrieved 2008-09-26.
16. "2.3.23-pre4 x86 64 GB RAM changes [HIGHMEM patch] explained a bit".
17. "More Intel Appendix H secrets to be released (4M Pages)".
18. ^ "x86 Specifics for Fedora 11".
19. "EnablingPAE". Retrieved 2013-04-28.
20. "RHEL 6 Release Notes, 12.6. General Kernel Updates 12.6.1. Physical Address Extension (PAE)". RedHat. Retrieved 27 November 2013.
21. Professional Linux Kernel Architecture, Figure 3.16 Code flow for paging_init, "Execute Disable Protection is also enabled if supported by processor and if the kernel was compiled with PAE support; unfortunately, the feature is otherwise not available."
22. "FreeBSD PAE(4) man page". 2003-04-08. Retrieved 2007-11-26.
23. "Solaris 7 5/99 Release Notes (Intel Platform Edition), Appendix B: Hardware Compatibility List and Device Configuration Guide (Intel Platform Edition) 5/99". 1999. Retrieved 2007-11-26.

Further reading

• "Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A: System Programming Guide, Part 1" (PDF). Intel.
• "Physical Address Extension". MSDN. Microsoft.

• X86 architecture
• Virtual memory
• Memory management
• X86 memory management