Misplaced Pages

This is an old revision of this page, as edited by Guy Harris (talk | contribs) at 20:45, 12 April 2017 (→"Paging and Virtual Memory": And even *more* reason why virtual memory is inherently relevant to PAE (PAE involves modifying the way paging translations work).). The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.

This article has not yet been rated on Misplaced Pages's content assessment scale. It is of interest to the following WikiProjects:

Please add the quality rating to the {{WikiProject banner shell}} template instead of this project banner. See WP:PIQA for details. Microsoft Windows: Computing Mid‑importance This article is within the scope of WikiProject Microsoft Windows, a collaborative effort to improve the coverage of Microsoft Windows on Misplaced Pages. If you would like to participate, please visit the project page, where you can join the discussion and see a list of open tasks.Microsoft WindowsWikipedia:WikiProject Microsoft WindowsTemplate:WikiProject Microsoft WindowsMicrosoft Windows Mid This article has been rated as Mid-importance on the project's importance scale. This article is supported by WikiProject Computing (assessed as Mid-importance). Please add the quality rating to the {{WikiProject banner shell}} template instead of this project banner. See WP:PIQA for details. Computing Mid‑importance This article is within the scope of WikiProject Computing, a collaborative effort to improve the coverage of computers, computing, and information technology on Misplaced Pages. If you would like to participate, please visit the project page, where you can join the discussion and see a list of open tasks.ComputingWikipedia:WikiProject ComputingTemplate:WikiProject ComputingComputing Mid This article has been rated as Mid-importance on the project's importance scale.

Archives (Index)

2014/August 2015/February 2015/June 2015/August 2016/July 2017/January 2017/June 2018/September 2020/February 2022/February

This page is archived by ClueBot III.

"offset within page" does not come from the page-table entry

The phrase should surely be . — Preceding unsigned comment added by 83.218.4.174 (talk) 23:56, 12 October 2016 (UTC)

You are of course correct - and nice catch, that's been on the page for a long time. You can of course make the change yourself if you want. Be WP:BOLD ! Jeh (talk) 03:08, 13 October 2016 (UTC)

"Paging and Virtual Memory"

Anyone reading this article should have at least a basic understanding of the concept of virtual memory in my opinion. And perhaps more importantly, the added section still requires such an understanding, because it provides no explanation of what paging and pages are to other readers. Therefore I don't see it as an improvement. It also seems to be copied and pasted from the source (judging from the excessive line breaks) and therefore not allowed.--Jasper Deng (talk) 19:40, 10 April 2017 (UTC)

It also didn't " how PAE works in IA-32" - the only thing it said about PAE is that "IA-32 architecture’s paging mechanism includes extensions that support Physical Address Extensions (PAE) to address physical address space greater than 4 GBytes." That says what PAE does, but doesn't say how it does it. The article already says what it does (in the lede, it says " It defines a page table hierarchy of three levels, with table entries of 64 bits each instead of 32, allowing these CPUs to access a physical address space larger than 4 gigabytes (2 bytes)."), and it later says how it does it (a quick mention in "Design", and a long description in "Page table structures"). Guy Harris (talk) 19:55, 10 April 2017 (UTC)

I'm glad I'm not the only one. I couldn't see where it "explained how PAE works" at all.

Worse: As suspected by Jasper Deng, the disputed material is a direct copy from volume 1, section 3.3.2, of the Intel® 64 and IA-32 Architectures Software Developer’s Manual. There is no doubt or ambiguity about that. The editor even copied the bulleted list from the Intel book as if it was ordinary text, resulting in "inline bullets". I have left a copyvio warning on their talk page.

What is especially odd here is that the same editor, PastieFace (talk · contribs · deleted contribs · logs · filter log · block user · block log), had previously dropped what was basically a CN tag on 3 GB barrier, claiming that a cited reference referred only to the Pentium Pro and that any statements about later processors were CN. Yet this editor is clearly aware of this Intel reference which defines PAE as part of the IA-32 architecture, not specific to any processor.

Both of these articles have been the target of much harassment over the last few years. I note that these recent instances happened shortly after I got a visit from our old friend and long-time sockpuppet Janagewen. Whether there's a connection there or not, I think PastieFace's future attempts can be ignored on WP:CIR grounds, and should be checked for WP:COPYVIO as well. Jeh (talk) 07:59, 11 April 2017 (UTC)

@PastieFace: If you bothered to look at the section on "Operating system support" you'll see that it's not a Windows-specific thing. And virtual memory has everything to do with it: each virtual address space remains 32-bit even if the physical memory is bigger, as your edit even mentions. If you do not have a good understanding of this concept, I suggest you avoid this topic.--Jasper Deng (talk) 20:28, 12 April 2017 (UTC)

Furthermore, if you don't have paging virtual memory enabled, PAE doesn't even exist - PAE involves a modified form of the page table, with larger page table entries capable of providing more bits of physical address, expanding the physical addresses generated for virtual addresses from 32 bits to 36 bits. Guy Harris (talk) 20:45, 12 April 2017 (UTC)

• All unassessed articles
• C-Class Microsoft Windows articles
• Mid-importance Microsoft Windows articles
• C-Class Computing articles
• Mid-importance Computing articles
• All Computing articles
• WikiProject Microsoft Windows articles