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Lookahead carry unit

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Fast Digital Addition Circuit

A lookahead carry unit (LCU) is a logical unit in digital circuit design used to decrease calculation time in adder units and used in conjunction with carry look-ahead adders (CLAs).

4-bit adder

A single 4-bit CLA is shown below:

4-bit adder with Carry Look Ahead (CLA)

16-bit adder

By combining four 4-bit CLAs, a 16-bit adder can be created but additional logic is needed in the form of an LCU.

The LCU accepts the group propagate ( P G {\displaystyle P_{G}} ) and group generate ( G G {\displaystyle G_{G}} ) from each of the four CLAs. P G {\displaystyle P_{G}} and G G {\displaystyle G_{G}} have the following expressions for each CLA adder:

P G = P 0 P 1 P 2 P 3 {\displaystyle P_{G}=P_{0}\cdot P_{1}\cdot P_{2}\cdot P_{3}}
G G = G 3 + G 2 P 3 + G 1 P 2 P 3 + G 0 P 1 P 2 P 3 {\displaystyle G_{G}=G_{3}+G_{2}\cdot P_{3}+G_{1}\cdot P_{2}\cdot P_{3}+G_{0}\cdot P_{1}\cdot P_{2}\cdot P_{3}}

The LCU then generates the carry input for each CLA.

Assume that P i {\displaystyle P_{i}} is P G {\displaystyle P_{G}} and G i {\displaystyle G_{i}} is G G {\displaystyle G_{G}} from the i CLA then the output carry bits are

C 4 = G 0 + P 0 C 0 {\displaystyle C_{4}=G_{0}+P_{0}\cdot C_{0}}
C 8 = G 4 + P 4 C 4 {\displaystyle C_{8}=G_{4}+P_{4}\cdot C_{4}}
C 12 = G 8 + P 8 C 8 {\displaystyle C_{12}=G_{8}+P_{8}\cdot C_{8}}
C 16 = G 12 + P 12 C 12 {\displaystyle C_{16}=G_{12}+P_{12}\cdot C_{12}}

Substituting C 4 {\displaystyle C_{4}} into C 8 {\displaystyle C_{8}} , then C 8 {\displaystyle C_{8}} into C 12 {\displaystyle C_{12}} , then C 12 {\displaystyle C_{12}} into C 16 {\displaystyle C_{16}} yields the expanded equations:

C 4 = G 0 + P 0 C 0 {\displaystyle C_{4}=G_{0}+P_{0}\cdot C_{0}}
C 8 = G 4 + G 0 P 4 + C 0 P 0 P 4 {\displaystyle C_{8}=G_{4}+G_{0}\cdot P_{4}+C_{0}\cdot P_{0}\cdot P_{4}}
C 12 = G 8 + G 4 P 8 + G 0 P 4 P 8 + C 0 P 0 P 4 P 8 {\displaystyle C_{12}=G_{8}+G_{4}\cdot P_{8}+G_{0}\cdot P_{4}\cdot P_{8}+C_{0}\cdot P_{0}\cdot P_{4}\cdot P_{8}}
C 16 = G 12 + G 8 P 12 + G 4 P 8 P 12 + G 0 P 4 P 8 P 12 + C 0 P 0 P 4 P 8 P 12 {\displaystyle C_{16}=G_{12}+G_{8}\cdot P_{12}+G_{4}\cdot P_{8}\cdot P_{12}+G_{0}\cdot P_{4}\cdot P_{8}\cdot P_{12}+C_{0}\cdot P_{0}\cdot P_{4}\cdot P_{8}\cdot P_{12}}

C 4 {\displaystyle C_{4}} corresponds to the carry input into the second CLA; C 8 {\displaystyle C_{8}} to the third CLA; C 12 {\displaystyle C_{12}} to the fourth CLA; and C 16 {\displaystyle C_{16}} to overflow carry bit.

In addition, the LCU can calculate its own propagate and generate:

P L C U = P 0 P 4 P 8 P 12 {\displaystyle P_{LCU}=P_{0}\cdot P_{4}\cdot P_{8}\cdot P_{12}}
G L C U = G 12 + G 8 P 12 + G 4 P 8 P 12 + G 0 P 4 P 8 P 12 {\displaystyle G_{LCU}=G_{12}+G_{8}\cdot P_{12}+G_{4}\cdot P_{8}\cdot P_{12}+G_{0}\cdot P_{4}\cdot P_{8}\cdot P_{12}}
C 16 = G L C U + C 0 P L C U {\displaystyle C_{16}=G_{LCU}+C_{0}\cdot P_{LCU}}
16-bit adder with LCU

64-bit adder

By combining 4 CLAs and an LCU together creates a 16-bit adder. Four of these units can be combined to form a 64-bit adder. An additional (second-level) LCU is needed that accepts the propagate ( P L C U {\displaystyle P_{LCU}} ) and generate ( G L C U {\displaystyle G_{LCU}} ) from each LCU and the four carry outputs generated by the second-level LCU are fed into the first-level LCUs.

64-bit adders with a second-level LCU

References

  1. "Carry Look Ahead Adder". Archived from the original on 2011-09-25. Retrieved 2011-10-07.
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