The High-Level Shader Language or High-Level Shading Language (HLSL) is a proprietary shading language developed by Microsoft for the Direct3D 9 API to augment the shader assembly language, and went on to become the required shading language for the unified shader model of Direct3D 10 and higher.
HLSL is analogous to the GLSL shading language used with the OpenGL standard. It is very similar to the Nvidia Cg shading language, as it was developed alongside it. Early versions of the two languages were considered identical, only marketed differently. HLSL shaders can enable profound speed and detail increases as well as many special effects in both 2D and 3D computer graphics.
HLSL programs come in six forms: pixel shaders (fragment in GLSL), vertex shaders, geometry shaders, compute shaders, tessellation shaders (Hull and Domain shaders), and ray tracing shaders (Ray Generation Shaders, Intersection Shaders, Any Hit/Closest Hit/Miss Shaders). A vertex shader is executed for each vertex that is submitted by the application, and is primarily responsible for transforming the vertex from object space to view space, generating texture coordinates, and calculating lighting coefficients such as the vertex's normal, tangent, and bitangent vectors. When a group of vertices (normally 3, to form a triangle) come through the vertex shader, their output position is interpolated to form pixels within its area; this process is known as rasterization.
Optionally, an application using a Direct3D 10/11/12 interface and Direct3D 10/11/12 hardware may also specify a geometry shader. This shader takes as its input some vertices of a primitive (triangle/line/point) and uses this data to generate/degenerate (or tessellate) additional primitives or to change the type of primitives, which are each then sent to the rasterizer.
D3D11.3 and D3D12 introduced Shader Model 5.1 and later 6.0.
Shader model comparison
GPUs listed are the hardware that first supported the given specifications. Manufacturers generally support all lower shader models through drivers. Note that games may claim to require a certain DirectX version, but don't necessarily require a GPU conforming to the full specification of that version, as developers can use a higher DirectX API version to target lower-Direct3D-spec hardware; for instance DirectX 9 exposes features of DirectX7-level hardware that DirectX7 did not, targeting their fixed-function T&L pipeline.
Pixel shader comparison
Pixel shader version | 1.0 | 1.1 | 1.2
1.3 |
1.4 | 2.0 | 2.0a | 2.0b | 3.0 | 4.04.1
5.0 |
---|---|---|---|---|---|---|---|---|---|
Dependent texture limit | 4 | 4 | 4 | 6 | 8 | Unlimited | 8 | Unlimited | Unlimited |
Texture instruction limit | 4 | 4 | 4 | 6 * 2 | 32 | Unlimited | Unlimited | Unlimited | Unlimited |
Arithmetic instruction limit | 8 | 8 | 8 | 8 * 2 | 64 | Unlimited | Unlimited | Unlimited | Unlimited |
Position register | No | No | No | No | No | No | No | Yes | Yes |
Instruction slots | 8 | 8 + 4 | 8 + 4 | (8 + 6) * 2 | 64 + 32 | 512 | 512 | ≥ 512 | ≥ 65536 |
Executed instructions | 8 | 8 + 4 | 8 + 4 | (8 + 6) * 2 | 64 + 32 | 512 | 512 | 65536 | Unlimited |
Texture indirections | 4 | 4 | 4 | 4 | 4 | Unlimited | 4 | Unlimited | Unlimited |
Interpolated registers | 2 + 4 | 2 + 4 | 2 + 4 | 2 + 6 | 2 + 8 | 2 + 8 | 2 + 8 | 10 | 32 |
Instruction predication | No | No | No | No | No | Yes | No | Yes | No |
Index input registers | No | No | No | No | No | No | No | Yes | Yes |
Temp registers | 2 | 2 + 4 | 3 + 4 | 6 | 12 to 32 | 22 | 32 | 32 | 4096 |
Constant registers | 8 | 8 | 8 | 8 | 32 | 32 | 32 | 224 | 16×4096 |
Arbitrary swizzling | No | No | No | No | No | Yes | No | Yes | Yes |
Gradient instructions | No | No | No | No | No | Yes | No | Yes | Yes |
Loop count register | No | No | No | No | No | No | No | Yes | Yes |
Face register (2-sided lighting) | No | No | No | No | No | No | Yes | Yes | Yes |
Dynamic flow control | No | No | No | No | No | No | No | Yes (24) | Yes (64) |
Bitwise Operators | No | No | No | No | No | No | No | No | Yes |
Native Integers | No | No | No | No | No | No | No | No | Yes |
- PS 1.0 — Unreleased 3dfx Rampage, DirectX 8
- PS 1.1 — GeForce 3, DirectX 8
- PS 1.2 — 3Dlabs Wildcat VP, DirectX 8.1
- PS 1.3 — GeForce 4 Ti, DirectX 8.1
- PS 1.4 — Radeon 8500–9250, Matrox Parhelia, DirectX 8.1
- Shader Model 2.0 — Radeon 9500–9800/X300–X600, DirectX 9
- Shader Model 2.0a — GeForce FX/PCX-optimized model, DirectX 9.0a
- Shader Model 2.0b — Radeon X700–X850 shader model, DirectX 9.0b
- Shader Model 3.0 — Radeon X1000 and GeForce 6, DirectX 9.0c
- Shader Model 4.0 — Radeon HD 2000 and GeForce 8, DirectX 10
- Shader Model 4.1 — Radeon HD 3000 and GeForce 200, DirectX 10.1
- Shader Model 5.0 — Radeon HD 5000 and GeForce 400, DirectX 11
- Shader Model 5.1 — GCN 1+, Fermi+, DirectX 12 (11_0+) with WDDM 2.0
- Shader Model 6.0 — GCN 1+, Kepler+, DirectX 12 (11_0+) with WDDM 2.1
- Shader Model 6.1 — GCN 1+, Kepler+, DirectX 12 (11_0+) with WDDM 2.3
- Shader Model 6.2 — GCN 1+, Kepler+, DirectX 12 (11_0+) with WDDM 2.4
- Shader Model 6.3 — GCN 1+, Kepler+, DirectX 12 (11_0+) with WDDM 2.5
- Shader Model 6.4 — GCN 1+, Kepler+, Skylake+, DirectX 12 (11_0+) with WDDM 2.6
- Shader Model 6.5 — GCN 1+, Kepler+, Skylake+, DirectX 12 (11_0+) with WDDM 2.7
- Shader Model 6.6 — GCN 4+, Maxwell+, DirectX 12 (11_0+) with WDDM 3.0
- Shader Model 6.7 — GCN 4+, Maxwell+, DirectX 12 (12_0+) with WDDM 3.1
- Shader Model 6.8 — RDNA 1+, Maxwell 2+, DirectX 12 (12_0+) with WDDM 3.2
"32 + 64" for Executed Instructions means "32 texture instructions and 64 arithmetic instructions."
Vertex shader comparison
Vertex shader version | 1.0 | 1.1 | 2.0 | 2.0a | 3.0 | 4.0 4.1 5.0 |
---|---|---|---|---|---|---|
# of instruction slots | 128 | 128 | 256 | 256 | ≥ 512 | ≥ 65536 |
Max # of instructions executed | 128 | 128 | 1024 | 65536 | 65536 | Unlimited |
Instruction predication | No | No | No | Yes | Yes | Yes |
Temp registers | 12 | 12 | 12 | 16 | 32 | 4096 |
# constant registers | ≥ 96 | ≥ 96 | ≥ 256 | 256 | ≥ 256 | 16×4096 |
Address register | No | Yes | Yes | Yes | Yes | Yes |
Static flow control | No | No | Yes | Yes | Yes | Yes |
Dynamic flow control | No | No | No | Yes | Yes | Yes |
Dynamic flow control depth | — | — | — | 24 | 24 | 64 |
Vertex texture fetch | No | No | No | No | Yes | Yes |
# of texture samplers | — | — | — | — | 4 | 128 |
Geometry instancing support | No | No | No | No | Yes | Yes |
Bitwise operators | No | No | No | No | No | Yes |
Native integers | No | No | No | No | No | Yes |
See also
Footnotes
- "Writing HLSL Shaders in Direct3D 9". Microsoft Docs. Retrieved February 22, 2021.
- "High-level shader language (HLSL)". Microsoft Docs. Retrieved February 22, 2021.
- "Fusion Industries :: Cg and HLSL FAQ ::". August 24, 2012. Archived from the original on August 24, 2012.
- "Shader Model 5.1 Objects". Microsoft Docs. Retrieved February 22, 2021.
- "HLSL Shader Model 6.0". Microsoft Docs. Retrieved February 22, 2021.
- ^ "Pixel Shader Differences". Microsoft Docs. August 19, 2020. Retrieved February 22, 2021.
- ^ Peeper, Craig; Mitchell, Jason L. (July 2003). "Introduction to the DirectX 9 High-Level Shader Language". Microsoft Docs. Retrieved February 22, 2021.
- ^ Shimpi, Anand Lal. "NVIDIA Introduces GeForce FX (NV30)". AnandTech. Retrieved February 22, 2021.
- Wilson, Derek. "ATI Radeon X800 Pro and XT Platinum Edition: R420 Arrives". AnandTech. Retrieved February 22, 2021.
- ^ Shader Model 3.0, Ashu Rege, NVIDIA Developer Technology Group, 2004.
- ^ The Direct3D 10 System, David Blythe, Microsoft Corporation, 2006.
- ^ "Registers - ps_4_1". Microsoft Docs. August 23, 2019. Retrieved February 22, 2021.
- ^ "Registers - ps_5_0". Microsoft Docs. August 23, 2019. Retrieved February 22, 2021.
- ^ "Vertex Shader Differences". Microsoft Docs. August 19, 2020. Retrieved February 22, 2021.
External links
- Programming guide for HLSL at Microsoft Docs
- Introduction to the DirectX 9 High Level Shading Language, (ATI) AMD developer central
- Riemer's HLSL Introduction & Tutorial (includes sample code) Archived November 19, 2008, at the Wayback Machine
- HLSL Introduction
- DirectX Intermediate Language (DXIL) specification