General information | |
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Launched | June 2007; 17 years ago (2007-06) |
Discontinued | 2008; 16 years ago (2008) |
Marketed by | Intel |
Designed by | Intel |
Common manufacturer |
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CPUID code | 06dx |
Product code | 80536 |
Performance | |
Max. CPU clock rate | 600 MHz to 800 MHz |
FSB speeds | 400 MT/s |
Cache | |
L1 cache | 64 KB (32 KB data + 32 KB instructions) |
L2 cache | 512 KB |
Architecture and classification | |
Application | Mobile Internet Device (MID) Ultra Mobile PC (UMPC) Ultralight laptop |
Technology node | 90 nm |
Microarchitecture | P6 variant |
Instruction set | x86 |
Instructions | MMX, SSE, SSE2 |
Physical specifications | |
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History | |
Predecessor | Pentium M |
Successor | Intel Atom |
Stealey is a low-power x86 architecture microprocessor based on a Dothan core derived from the Intel Pentium M, built on a 90 nm process with 512 KB L2 cache and 400 MT/s front side bus (FSB). It was branded as Intel A100 and Intel A110 and appeared as part of the McCaslin platform. They were replaced in 2008 by the Menlow platform, including the 45 nm Silverthorne CPU and Poulsbo SCH.
The A110 runs at 800 MHz, the A100 at 600 MHz, and both have a TDP of 3 watts, and a power consumption in the lowest power state of only 0.4 watts.
The A100 and A110 processors are part of the Intel Ultra Mobile Platform 2007 and were designed to be used in MIDs, UMPCs and Ultralight laptops.
See also
- Pentium M (microarchitecture)
- Mobile Internet device (MID)
- Intel Atom - Intel's successor for this market
- AMD Geode - A similar x86 chip from a different manufacturer
References
- Evan Blass (2007-04-06), Intel poised to unveil new UMPC platform?, Engadget, retrieved 2008-01-25
- Intel News Disclosures From Day 2 Of The Intel Developer Forum In Beijing, Intel, 2007-04-18, retrieved 2008-01-25
- Intel Processor A100 and A110 on 90 nm Process with 512-KB L2 Cache (PDF), Intel, archived from the original (PDF) on 2008-02-24, retrieved 2008-01-25
- Intel Ultra Mobile Platform 2007, Intel, retrieved 2008-01-25
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